From: "Ni, Ray" <ray.ni@intel.com>
To: "Javeed, Ashraf" <ashraf.javeed@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Wang, Jian J" <jian.j.wang@intel.com>, "Wu, Hao A" <hao.a.wu@intel.com>
Subject: Re: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 02/12] PciBusDxe: Reorganize the PCI Platform Protocol usage code
Date: Mon, 16 Dec 2019 12:46:57 +0000 [thread overview]
Message-ID: <734D49CCEBEEF84792F5B80ED585239D5C39EEA8@SHSMSX104.ccr.corp.intel.com> (raw)
In-Reply-To: <95C5C2B113DE604FB208120C742E982457917180@BGSMSX101.gar.corp.intel.com>
With comments in https://bugzilla.tianocore.org/show_bug.cgi?id=1954,
a new PCIE Override protocol will be added.
So this patch review is skipped.
> -----Original Message-----
> From: Javeed, Ashraf <ashraf.javeed@intel.com>
> Sent: Wednesday, November 13, 2019 11:24 AM
> To: devel@edk2.groups.io; Javeed, Ashraf <ashraf.javeed@intel.com>
> Cc: Wang, Jian J <jian.j.wang@intel.com>; Wu, Hao A <hao.a.wu@intel.com>; Ni, Ray <ray.ni@intel.com>
> Subject: RE: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 02/12] PciBusDxe: Reorganize the PCI Platform
> Protocol usage code
>
> This patch is also uploaded in the following Repo, for review:-
> https://github.com/ashrafj/edk2-staging/commit/ff68bb88bdb81d3921ebc7410c69e52e9d2fdb0e
>
> Thanks
> Ashraf
>
> > -----Original Message-----
> > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Javeed,
> > Ashraf
> > Sent: Friday, November 1, 2019 8:40 PM
> > To: devel@edk2.groups.io
> > Cc: Wang, Jian J <jian.j.wang@intel.com>; Wu, Hao A <hao.a.wu@intel.com>;
> > Ni, Ray <ray.ni@intel.com>
> > Subject: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 02/12]
> > PciBusDxe: Reorganize the PCI Platform Protocol usage code
> >
> > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2194
> >
> > The following legacy PCI Platform Protocol usage is reorganized in the separate
> > source files:-
> > (1) PlatformPrepController
> > (2) PlatformNotify
> > (3) GetPlatformPolicy
> > (4) GetPciRom
> >
> > This code changes are made to support the new PCI Platform Protocol along
> > with the existing legacy interface in the PCI Bus driver.
> >
> > Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com>
> > Cc: Jian J Wang <jian.j.wang@intel.com>
> > Cc: Hao A Wu <hao.a.wu@intel.com>
> > Cc: Ray Ni <ray.ni@intel.com>
> > ---
> > MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 23 ++---------------------
> > MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 3 +--
> > MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 2 ++
> > MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c | 58 +++++++++++-----
> > ------------------------------------------
> > MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c | 139
> > +++++++++++++++++++++++++++++++++------------------------------------------------
> > ----------------------------------------------------------
> > MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c | 254
> > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.h | 109
> > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > ++++++++++++++++++++++++++++++++++++++++++++
> > MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c | 15 +--------------
> > 8 files changed, 413 insertions(+), 190 deletions(-)
> >
> > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
> > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
> > index b020ce5..45cd64d 100644
> > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
> > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
> > @@ -8,7 +8,7 @@
> > PCI Root Bridges. So it means platform needs install PCI Root Bridge IO
> > protocol for each
> > PCI Root Bus and install PCI Host Bridge Resource Allocation Protocol.
> >
> > -Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
> > +Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
> > SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > **/
> > @@ -34,8 +34,6 @@ BOOLEAN gFullEnumeration =
> > TRUE;
> > UINT64 gAllOne = 0xFFFFFFFFFFFFFFFFULL;
> > UINT64 gAllZero = 0;
> >
> > -EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol;
> > -EFI_PCI_OVERRIDE_PROTOCOL *gPciOverrideProtocol;
> > EDKII_IOMMU_PROTOCOL *mIoMmuProtocol;
> >
> >
> > @@ -266,24 +264,7 @@ PciBusDriverBindingStart (
> > // If PCI Platform protocol is available, get it now.
> > // If the platform implements this, it must be installed before BDS phase
> > //
> > - gPciPlatformProtocol = NULL;
> > - gBS->LocateProtocol (
> > - &gEfiPciPlatformProtocolGuid,
> > - NULL,
> > - (VOID **) &gPciPlatformProtocol
> > - );
> > -
> > - //
> > - // If PCI Platform protocol doesn't exist, try to Pci Override Protocol.
> > - //
> > - if (gPciPlatformProtocol == NULL) {
> > - gPciOverrideProtocol = NULL;
> > - gBS->LocateProtocol (
> > - &gEfiPciOverrideProtocolGuid,
> > - NULL,
> > - (VOID **) &gPciOverrideProtocol
> > - );
> > - }
> > + LocatePciPlatformProtocol ();
> >
> > if (mIoMmuProtocol == NULL) {
> > gBS->LocateProtocol (
> > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
> > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
> > index 504a1b1..141c158 100644
> > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
> > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
> > @@ -79,6 +79,7 @@ typedef enum {
> > #include "PciPowerManagement.h"
> > #include "PciHotPlugSupport.h"
> > #include "PciLib.h"
> > +#include "PciPlatformSupport.h"
> >
> > #define VGABASE1 0x3B0
> > #define VGALIMIT1 0x3BB
> > @@ -307,8 +308,6 @@ extern UINTN
> > gPciHostBridgeNumber;
> > extern EFI_HANDLE
> > gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
> > extern UINT64 gAllOne;
> > extern UINT64 gAllZero;
> > -extern EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol;
> > -extern EFI_PCI_OVERRIDE_PROTOCOL *gPciOverrideProtocol;
> > extern BOOLEAN mReserveIsaAliases;
> > extern BOOLEAN mReserveVgaAliases;
> >
> > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
> > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
> > index 6dab970..4ce99ce 100644
> > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
> > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
> > @@ -59,6 +59,8 @@
> > PciBus.h
> > PciFeatureSupport.c
> > PciFeatureSupport.h
> > + PciPlatformSupport.c
> > + PciPlatformSupport.h
> >
> > [Packages]
> > MdePkg/MdePkg.dec
> > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
> > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
> > index b7832c6..149a120 100644
> > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
> > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
> > @@ -208,8 +208,6 @@ RegisterPciDevice (
> > )
> > {
> > EFI_STATUS Status;
> > - VOID *PlatformOpRomBuffer;
> > - UINTN PlatformOpRomSize;
> > EFI_PCI_IO_PROTOCOL *PciIo;
> > UINT8 Data8;
> > BOOLEAN HasEfiImage;
> > @@ -244,49 +242,16 @@ RegisterPciDevice (
> > //
> > // Get the OpRom provided by platform
> > //
> > - if (gPciPlatformProtocol != NULL) {
> > - Status = gPciPlatformProtocol->GetPciRom (
> > - gPciPlatformProtocol,
> > - PciIoDevice->Handle,
> > - &PlatformOpRomBuffer,
> > - &PlatformOpRomSize
> > - );
> > - if (!EFI_ERROR (Status)) {
> > - PciIoDevice->EmbeddedRom = FALSE;
> > - PciIoDevice->RomSize = (UINT32) PlatformOpRomSize;
> > - PciIoDevice->PciIo.RomSize = PlatformOpRomSize;
> > - PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;
> > - //
> > - // For OpROM read from gPciPlatformProtocol:
> > - // Add the Rom Image to internal database for later PCI light enumeration
> > - //
> > - PciRomAddImageMapping (
> > - NULL,
> > - PciIoDevice->PciRootBridgeIo->SegmentNumber,
> > - PciIoDevice->BusNumber,
> > - PciIoDevice->DeviceNumber,
> > - PciIoDevice->FunctionNumber,
> > - PciIoDevice->PciIo.RomImage,
> > - PciIoDevice->PciIo.RomSize
> > - );
> > - }
> > - } else if (gPciOverrideProtocol != NULL) {
> > - Status = gPciOverrideProtocol->GetPciRom (
> > - gPciOverrideProtocol,
> > - PciIoDevice->Handle,
> > - &PlatformOpRomBuffer,
> > - &PlatformOpRomSize
> > - );
> > - if (!EFI_ERROR (Status)) {
> > - PciIoDevice->EmbeddedRom = FALSE;
> > - PciIoDevice->RomSize = (UINT32) PlatformOpRomSize;
> > - PciIoDevice->PciIo.RomSize = PlatformOpRomSize;
> > - PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;
> > - //
> > - // For OpROM read from gPciOverrideProtocol:
> > - // Add the Rom Image to internal database for later PCI light enumeration
> > - //
> > - PciRomAddImageMapping (
> > + Status = GetPlatformPciOptionRom (
> > + Controller,
> > + PciIoDevice
> > + );
> > + if (!EFI_ERROR (Status)) {
> > + //
> > + // For OpROM read from the PCI Platform Protocol:
> > + // Add the Rom Image to internal database for later PCI light enumeration
> > + //
> > + PciRomAddImageMapping (
> > NULL,
> > PciIoDevice->PciRootBridgeIo->SegmentNumber,
> > PciIoDevice->BusNumber,
> > @@ -294,8 +259,7 @@ RegisterPciDevice (
> > PciIoDevice->FunctionNumber,
> > PciIoDevice->PciIo.RomImage,
> > PciIoDevice->PciIo.RomSize
> > - );
> > - }
> > + );
> > }
> > }
> >
> > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
> > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
> > index 8db1ebf..aef8a3b 100644
> > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
> > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
> > @@ -1003,7 +1003,7 @@ PciHostBridgeAdjustAllocation (
> > Status = RejectPciDevice (PciResNode->PciDev);
> > if (Status == EFI_SUCCESS) {
> > DEBUG ((
> > - EFI_D_ERROR,
> > + DEBUG_ERROR,
> > "PciBus: [%02x|%02x|%02x] was rejected due to resource confliction.\n",
> > PciResNode->PciDev->BusNumber, PciResNode->PciDev->DeviceNumber,
> > PciResNode->PciDev->FunctionNumber
> > ));
> > @@ -1746,7 +1746,7 @@ NotifyPhase (
> >
> > HostBridgeHandle = NULL;
> > RootBridgeHandle = NULL;
> > - if (gPciPlatformProtocol != NULL) {
> > + if (CheckPciPlatformProtocolInstall()) {
> > //
> > // Get Host Bridge Handle.
> > //
> > @@ -1770,42 +1770,11 @@ NotifyPhase (
> > //
> > // Call PlatformPci::PlatformNotify() if the protocol is present.
> > //
> > - gPciPlatformProtocol->PlatformNotify (
> > - gPciPlatformProtocol,
> > - HostBridgeHandle,
> > - Phase,
> > - ChipsetEntry
> > - );
> > - } else if (gPciOverrideProtocol != NULL){
> > - //
> > - // Get Host Bridge Handle.
> > - //
> > - PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle);
> > -
> > - //
> > - // Get the rootbridge Io protocol to find the host bridge handle
> > - //
> > - Status = gBS->HandleProtocol (
> > - RootBridgeHandle,
> > - &gEfiPciRootBridgeIoProtocolGuid,
> > - (VOID **) &PciRootBridgeIo
> > - );
> > -
> > - if (EFI_ERROR (Status)) {
> > - return EFI_NOT_FOUND;
> > - }
> > -
> > - HostBridgeHandle = PciRootBridgeIo->ParentHandle;
> > -
> > - //
> > - // Call PlatformPci::PhaseNotify() if the protocol is present.
> > - //
> > - gPciOverrideProtocol->PlatformNotify (
> > - gPciOverrideProtocol,
> > - HostBridgeHandle,
> > - Phase,
> > - ChipsetEntry
> > - );
> > + PciPlatformNotifyPhase (
> > + HostBridgeHandle,
> > + Phase,
> > + ChipsetEntry
> > + );
> > }
> >
> > Status = PciResAlloc->NotifyPhase (
> > @@ -1813,27 +1782,15 @@ NotifyPhase (
> > Phase
> > );
> >
> > - if (gPciPlatformProtocol != NULL) {
> > + if (CheckPciPlatformProtocolInstall()) {
> > //
> > // Call PlatformPci::PlatformNotify() if the protocol is present.
> > //
> > - gPciPlatformProtocol->PlatformNotify (
> > - gPciPlatformProtocol,
> > - HostBridgeHandle,
> > - Phase,
> > - ChipsetExit
> > - );
> > -
> > - } else if (gPciOverrideProtocol != NULL) {
> > - //
> > - // Call PlatformPci::PhaseNotify() if the protocol is present.
> > - //
> > - gPciOverrideProtocol->PlatformNotify (
> > - gPciOverrideProtocol,
> > - HostBridgeHandle,
> > - Phase,
> > - ChipsetExit
> > - );
> > + PciPlatformNotifyPhase (
> > + HostBridgeHandle,
> > + Phase,
> > + ChipsetExit
> > + );
> > }
> >
> > return Status;
> > @@ -1914,31 +1871,16 @@ PreprocessController (
> > RootBridgePciAddress.Bus = Bus;
> > RootBridgePciAddress.ExtendedRegister = 0;
> >
> > - if (gPciPlatformProtocol != NULL) {
> > - //
> > - // Call PlatformPci::PrepController() if the protocol is present.
> > - //
> > - gPciPlatformProtocol->PlatformPrepController (
> > - gPciPlatformProtocol,
> > - HostBridgeHandle,
> > - RootBridgeHandle,
> > - RootBridgePciAddress,
> > - Phase,
> > - ChipsetEntry
> > - );
> > - } else if (gPciOverrideProtocol != NULL) {
> > - //
> > - // Call PlatformPci::PrepController() if the protocol is present.
> > - //
> > - gPciOverrideProtocol->PlatformPrepController (
> > - gPciOverrideProtocol,
> > - HostBridgeHandle,
> > - RootBridgeHandle,
> > - RootBridgePciAddress,
> > - Phase,
> > - ChipsetEntry
> > - );
> > - }
> > + //
> > + // Call PlatformPci::PrepController() if the protocol is present.
> > + //
> > + PciPlatformPreprocessController (
> > + HostBridgeHandle,
> > + RootBridgeHandle,
> > + RootBridgePciAddress,
> > + Phase,
> > + ChipsetEntry
> > + );
> >
> > Status = PciResAlloc->PreprocessController (
> > PciResAlloc,
> > @@ -1947,31 +1889,16 @@ PreprocessController (
> > Phase
> > );
> >
> > - if (gPciPlatformProtocol != NULL) {
> > - //
> > - // Call PlatformPci::PrepController() if the protocol is present.
> > - //
> > - gPciPlatformProtocol->PlatformPrepController (
> > - gPciPlatformProtocol,
> > - HostBridgeHandle,
> > - RootBridgeHandle,
> > - RootBridgePciAddress,
> > - Phase,
> > - ChipsetExit
> > - );
> > - } else if (gPciOverrideProtocol != NULL) {
> > - //
> > - // Call PlatformPci::PrepController() if the protocol is present.
> > - //
> > - gPciOverrideProtocol->PlatformPrepController (
> > - gPciOverrideProtocol,
> > - HostBridgeHandle,
> > - RootBridgeHandle,
> > - RootBridgePciAddress,
> > - Phase,
> > - ChipsetExit
> > - );
> > - }
> > + //
> > + // Call PlatformPci::PrepController() if the protocol is present.
> > + //
> > + PciPlatformPreprocessController (
> > + HostBridgeHandle,
> > + RootBridgeHandle,
> > + RootBridgePciAddress,
> > + Phase,
> > + ChipsetExit
> > + );
> >
> > return EFI_SUCCESS;
> > }
> > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c
> > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c
> > new file mode 100644
> > index 0000000..6f95794
> > --- /dev/null
> > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c
> > @@ -0,0 +1,254 @@
> > +/** @file
> > + This file encapsulate the usage of PCI Platform Protocol
> > +
> > + This file define the necessary hooks used to obtain the platform
> > + level data and policies which could be used in the PCI Enumeration
> > + phases
> > +
> > +Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
> > +SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#include "PciBus.h"
> > +
> > +EFI_PCI_PLATFORM_PROTOCOL *mPciPlatformProtocol;
> > +EFI_PCI_OVERRIDE_PROTOCOL *mPciOverrideProtocol;
> > +
> > +
> > +
> > +/**
> > + This function retrieves the PCI Platform Protocol published by
> > +platform driver
> > +
> > +**/
> > +VOID
> > +LocatePciPlatformProtocol (
> > + )
> > +{
> > + mPciPlatformProtocol = NULL;
> > + gBS->LocateProtocol (
> > + &gEfiPciPlatformProtocolGuid,
> > + NULL,
> > + (VOID **) &mPciPlatformProtocol
> > + );
> > +
> > + //
> > + // If PCI Platform protocol doesn't exist, try to get Pci Override Protocol.
> > + //
> > + if (mPciPlatformProtocol == NULL) {
> > + mPciOverrideProtocol = NULL;
> > + gBS->LocateProtocol (
> > + &gEfiPciOverrideProtocolGuid,
> > + NULL,
> > + (VOID **) &mPciOverrideProtocol
> > + );
> > + }
> > +}
> > +
> > +/**
> > + This function indicates the presence of PCI Platform driver
> > + @retval TRUE or FALSE
> > +**/
> > +BOOLEAN
> > +CheckPciPlatformProtocolInstall (
> > + )
> > +{
> > +
> > + if (mPciPlatformProtocol != NULL) {
> > + return TRUE;
> > + } else if (mPciOverrideProtocol != NULL){
> > + return TRUE;
> > + }
> > +
> > + return FALSE;
> > +}
> > +
> > +/**
> > + Provides the hooks from the PCI bus driver to every PCI controller
> > +(device/function) at various
> > + stages of the PCI enumeration process that allow the host bridge
> > +driver to preinitialize individual
> > + PCI controllers before enumeration.
> > +
> > + This function is called during the PCI enumeration process. No
> > + specific action is expected from this member function. It allows the
> > + host bridge driver to preinitialize individual PCI controllers before
> > enumeration.
> > +
> > + @param[in] HostBridgeHandle The associated PCI host bridge handle.
> > + @param[in] RootBridgeHandle The associated PCI root bridge handle.
> > + @param[in] RootBridgePciAddress The address of the PCI device on the PCI
> > bus.
> > + @param[in] Phase The phase of the PCI controller enumeration.
> > + @param[in] ExecPhase Defines the execution phase of the PCI chipset
> > driver.
> > +
> > + @retval Status returns the status from the PCI Platform protocol as is
> > +
> > +**/
> > +EFI_STATUS
> > +PciPlatformPreprocessController (
> > + IN EFI_HANDLE HostBridgeHandle,
> > + IN EFI_HANDLE RootBridgeHandle,
> > + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS
> > RootBridgePciAddress,
> > + IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,
> > + IN EFI_PCI_EXECUTION_PHASE ExecPhase
> > + )
> > +{
> > + EFI_STATUS Status;
> > + if (mPciPlatformProtocol != NULL) {
> > + //
> > + // Call PlatformPci::PrepController() if the protocol is present.
> > + //
> > + Status = mPciPlatformProtocol->PlatformPrepController (
> > + mPciPlatformProtocol,
> > + HostBridgeHandle,
> > + RootBridgeHandle,
> > + RootBridgePciAddress,
> > + Phase,
> > + ExecPhase
> > + );
> > + } else if (mPciOverrideProtocol != NULL) {
> > + //
> > + // Call PlatformPci::PrepController() if the protocol is present.
> > + //
> > + Status = mPciOverrideProtocol->PlatformPrepController (
> > + mPciOverrideProtocol,
> > + HostBridgeHandle,
> > + RootBridgeHandle,
> > + RootBridgePciAddress,
> > + Phase,
> > + ExecPhase
> > + );
> > + } else {
> > + //
> > + // return PCI Platform Protocol not found
> > + //
> > + return EFI_NOT_FOUND;
> > + }
> > + return Status;
> > +}
> > +
> > +/**
> > + This function notifies the PCI Platform driver about the PCI host
> > +bridge resource
> > + allocation phase and PCI execution phase.
> > +
> > + @param[in] HostBridge The handle of the host bridge controller.
> > + @param[in] Phase The phase of the PCI bus enumeration.
> > + @param[in] ExecPhase Defines the execution phase of the PCI chipset
> > driver.
> > + @retval Status returns the status from the PCI Platform protocol as is
> > +
> > +**/
> > +EFI_STATUS
> > +PciPlatformNotifyPhase (
> > + IN EFI_HANDLE HostBridgeHandle,
> > + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,
> > + IN EFI_PCI_EXECUTION_PHASE ExecPhase
> > + )
> > +{
> > + EFI_STATUS Status;
> > +
> > +
> > + if (mPciPlatformProtocol != NULL) {
> > + Status = mPciPlatformProtocol->PlatformNotify (
> > + mPciPlatformProtocol,
> > + HostBridgeHandle,
> > + Phase,
> > + ExecPhase
> > + );
> > + } else if (mPciOverrideProtocol != NULL){
> > + Status = mPciOverrideProtocol->PlatformNotify (
> > + mPciOverrideProtocol,
> > + HostBridgeHandle,
> > + Phase,
> > + ExecPhase
> > + );
> > + } else {
> > + //
> > + // return PCI Platform Protocol not found
> > + //
> > + return EFI_NOT_FOUND;
> > + }
> > + return Status;
> > +}
> > +
> > +/**
> > + This function retrieves the PCI platform policy.
> > +
> > + @param PciPolicy pointer to the legacy EFI_PCI_PLATFORM_POLICY
> > + @retval Status returns the status from the PCI Platform protocol as is
> > +
> > +**/
> > +EFI_STATUS
> > +PciGetPlatformPolicy (
> > + OUT EFI_PCI_PLATFORM_POLICY *PciPolicy
> > + )
> > +{
> > + EFI_STATUS Status;
> > + if (mPciPlatformProtocol != NULL) {
> > + Status = mPciPlatformProtocol->GetPlatformPolicy (
> > + mPciPlatformProtocol,
> > + PciPolicy
> > + );
> > + }
> > +
> > + if (mPciOverrideProtocol != NULL) {
> > + Status = mPciOverrideProtocol->GetPlatformPolicy (
> > + mPciOverrideProtocol,
> > + PciPolicy
> > + );
> > + } else {
> > + //
> > + // return PCI Platform Protocol not found
> > + //
> > + return EFI_NOT_FOUND;
> > + }
> > + return Status;
> > +}
> > +
> > +/**
> > + This function retrieves the Option ROM image and size from the Platform.
> > +
> > + It uses the PCI_IO_DEVICE internal fields are used to store OpROM
> > + image/size
> > +
> > + @param Controller An EFI handle for the PCI bus controller.
> > + @param PciIoDevice A PCI_IO_DEVICE pointer to the PCI IO device to be
> > registered.
> > +
> > + @retval EFI_SUCCESS The option ROM was available for this device and
> > loaded into memory.
> > + @retval EFI_NOT_FOUND No option ROM was available for this device.
> > + @retval EFI_OUT_OF_RESOURCES No memory was available to load the
> > option ROM.
> > + @retval EFI_DEVICE_ERROR An error occurred in obtaining the option
> > ROM.
> > +
> > +**/
> > +EFI_STATUS
> > +GetPlatformPciOptionRom (
> > + IN EFI_HANDLE Controller,
> > + IN PCI_IO_DEVICE *PciIoDevice
> > + )
> > +{
> > + EFI_STATUS Status;
> > + VOID *PlatformOpRomBuffer;
> > + UINTN PlatformOpRomSize;
> > + if (mPciPlatformProtocol != NULL) {
> > + Status = mPciPlatformProtocol->GetPciRom (
> > + mPciPlatformProtocol,
> > + PciIoDevice->Handle,
> > + &PlatformOpRomBuffer,
> > + &PlatformOpRomSize
> > + );
> > + } else if (mPciOverrideProtocol != NULL) {
> > + Status = mPciOverrideProtocol->GetPciRom (
> > + mPciOverrideProtocol,
> > + PciIoDevice->Handle,
> > + &PlatformOpRomBuffer,
> > + &PlatformOpRomSize
> > + );
> > + } else {
> > + //
> > + // return PCI Platform Protocol not found
> > + //
> > + return EFI_NOT_FOUND;
> > + }
> > +
> > + if (!EFI_ERROR (Status)) {
> > + PciIoDevice->EmbeddedRom = FALSE;
> > + PciIoDevice->RomSize = (UINT32)PlatformOpRomSize;
> > + PciIoDevice->PciIo.RomSize = PlatformOpRomSize;
> > + PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;
> > + }
> > + return Status;
> > +}
> > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.h
> > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.h
> > new file mode 100644
> > index 0000000..c0d3b49
> > --- /dev/null
> > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.h
> > @@ -0,0 +1,109 @@
> > +/** @file
> > + This file encapsulate the usage of PCI Platform Protocol
> > +
> > + This file define the necessary hooks used to obtain the platform
> > + level data and policies which could be used in the PCI Enumeration
> > + phases
> > +
> > +Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
> > +SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +
> > +#ifndef _EFI_PCI_PLATFORM_SUPPORT_H_
> > +#define _EFI_PCI_PLATFORM_SUPPORT_H_
> > +
> > +/**
> > + This function retrieves the PCI Platform Protocol published by
> > +platform driver
> > +
> > +**/
> > +VOID
> > +LocatePciPlatformProtocol (
> > + );
> > +
> > +/**
> > + This function indicates the presence of PCI Platform driver
> > + @retval TRUE or FALSE
> > +**/
> > +BOOLEAN
> > +CheckPciPlatformProtocolInstall (
> > + );
> > +
> > +
> > +/**
> > + Provides the hooks from the PCI bus driver to every PCI controller
> > +(device/function) at various
> > + stages of the PCI enumeration process that allow the host bridge
> > +driver to preinitialize individual
> > + PCI controllers before enumeration.
> > +
> > + This function is called during the PCI enumeration process. No
> > + specific action is expected from this member function. It allows the
> > + host bridge driver to preinitialize individual PCI controllers before
> > enumeration.
> > +
> > + @param[in] HostBridgeHandle The associated PCI host bridge handle.
> > + @param[in] RootBridgeHandle The associated PCI root bridge handle.
> > + @param[in] RootBridgePciAddress The address of the PCI device on the PCI
> > bus.
> > + @param[in] Phase The phase of the PCI controller enumeration.
> > + @param[in] ExecPhase Defines the execution phase of the PCI chipset
> > driver.
> > +
> > + @retval Status returns the status from the PCI Platform protocol as is
> > +
> > +**/
> > +EFI_STATUS
> > +PciPlatformPreprocessController (
> > + IN EFI_HANDLE HostBridgeHandle,
> > + IN EFI_HANDLE RootBridgeHandle,
> > + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS
> > RootBridgePciAddress,
> > + IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,
> > + IN EFI_PCI_EXECUTION_PHASE ExecPhase
> > + );
> > +
> > +/**
> > + This function notifies the PCI Platform driver about the PCI host
> > +bridge resource
> > + allocation phase and PCI execution phase.
> > +
> > + @param[in] HostBridge The handle of the host bridge controller.
> > + @param[in] Phase The phase of the PCI bus enumeration.
> > + @param[in] ExecPhase Defines the execution phase of the PCI chipset
> > driver.
> > + @retval Status returns the status from the PCI Platform protocol as is
> > +
> > +**/
> > +EFI_STATUS
> > +PciPlatformNotifyPhase (
> > + IN EFI_HANDLE HostBridgeHandle,
> > + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,
> > + IN EFI_PCI_EXECUTION_PHASE ExecPhase
> > + );
> > +
> > +/**
> > + This function retrieves the PCI platform policy.
> > +
> > + @param PciPolicy pointer to the legacy EFI_PCI_PLATFORM_POLICY
> > + @retval Status returns the status from the PCI Platform protocol as is
> > +
> > +**/
> > +EFI_STATUS
> > +PciGetPlatformPolicy (
> > + OUT EFI_PCI_PLATFORM_POLICY *PciPolicy
> > + );
> > +
> > +/**
> > + This function retrieves the Option ROM image and size from the Platform.
> > +
> > + It uses the PCI_IO_DEVICE internal fields are used to store OpROM
> > + image/size
> > +
> > + @param Controller An EFI handle for the PCI bus controller.
> > + @param PciIoDevice A PCI_IO_DEVICE pointer to the PCI IO device to be
> > registered.
> > +
> > + @retval EFI_SUCCESS The option ROM was available for this device and
> > loaded into memory.
> > + @retval EFI_NOT_FOUND No option ROM was available for this device.
> > + @retval EFI_OUT_OF_RESOURCES No memory was available to load the
> > option ROM.
> > + @retval EFI_DEVICE_ERROR An error occurred in obtaining the option
> > ROM.
> > +
> > +**/
> > +EFI_STATUS
> > +GetPlatformPciOptionRom (
> > + IN EFI_HANDLE Controller,
> > + IN PCI_IO_DEVICE *PciIoDevice
> > + );
> > +
> > +#endif
> > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
> > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
> > index 4969ee0..be6f42a 100644
> > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
> > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
> > @@ -198,20 +198,7 @@ CalculateApertureIo16 (
> > //
> > Status = EFI_NOT_FOUND;
> > PciPolicy = 0;
> > - if (gPciPlatformProtocol != NULL) {
> > - Status = gPciPlatformProtocol->GetPlatformPolicy (
> > - gPciPlatformProtocol,
> > - &PciPolicy
> > - );
> > - }
> > -
> > - if (EFI_ERROR (Status) && gPciOverrideProtocol != NULL) {
> > - Status = gPciOverrideProtocol->GetPlatformPolicy (
> > - gPciOverrideProtocol,
> > - &PciPolicy
> > - );
> > - }
> > -
> > + Status = PciGetPlatformPolicy (&PciPolicy);
> > if (!EFI_ERROR (Status)) {
> > if ((PciPolicy & EFI_RESERVE_ISA_IO_ALIAS) != 0) {
> > mReserveIsaAliases = TRUE;
> > --
> > 2.21.0.windows.1
> >
> >
> >
next prev parent reply other threads:[~2019-12-16 12:47 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-01 15:09 [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 00/12] New PCI features - MPS, MRRS, RO, NS, CTO Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 01/12] MdeModulePkg/PciBusDxe:New PCI features separation with PCD Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 02/12] PciBusDxe: Reorganize the PCI Platform Protocol usage code Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 03/12] PciBusDxe: Separation of the PCI device registration and start Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 04/12] PciBusDxe: Inclusion of new PCI Platform Protocol 2 Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 05/12] PciBusDxe: Setup sub-phases for PCI feature enumeration Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 06/12] PciBusDxe: Integration of setup " Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 07/12] PciBusDxe: Record the PCI-Express Capability Structure Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 08/12] PciBusDxe: New PCI feature Max_Payload_Size Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 09/12] PciBusDxe: New PCI feature Max_Read_Req_Size Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 10/12] PciBusDxe: New PCI feature Relax Ordering Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 11/12] PciBusDxe: New PCI feature No-Snoop Javeed, Ashraf
2019-11-01 15:09 ` [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 12/12] PciBusDxe: New PCI feature Completion Timeout Javeed, Ashraf
[not found] ` <15D3127A726D26A6.7420@groups.io>
2019-11-13 3:22 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 01/12] MdeModulePkg/PciBusDxe:New PCI features separation with PCD Javeed, Ashraf
2019-12-16 12:46 ` Ni, Ray
[not found] ` <15D3127AABF5037C.32624@groups.io>
2019-11-13 3:23 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 02/12] PciBusDxe: Reorganize the PCI Platform Protocol usage code Javeed, Ashraf
2019-12-16 12:46 ` Ni, Ray [this message]
[not found] ` <15D3127A98E21087.7420@groups.io>
2019-11-13 3:25 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 03/12] PciBusDxe: Separation of the PCI device registration and start Javeed, Ashraf
2019-12-17 1:38 ` Ni, Ray
2019-12-17 3:19 ` Javeed, Ashraf
2019-12-19 1:34 ` Ni, Ray
2019-12-19 4:12 ` Javeed, Ashraf
[not found] ` <15D3127AAE5DC481.32624@groups.io>
2019-11-13 3:26 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 04/12] PciBusDxe: Inclusion of new PCI Platform Protocol 2 Javeed, Ashraf
[not found] ` <15D3127B934F51D3.12315@groups.io>
2019-11-13 3:27 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 05/12] PciBusDxe: Setup sub-phases for PCI feature enumeration Javeed, Ashraf
2019-12-17 11:56 ` Ni, Ray
2019-12-18 7:14 ` Javeed, Ashraf
2019-12-19 5:48 ` Ni, Ray
[not found] ` <15E1AFB3EABD031C.30484@groups.io>
2020-03-05 14:12 ` Ni, Ray
2020-03-16 9:33 ` Javeed, Ashraf
2020-03-16 14:00 ` Ni, Ray
2020-03-17 7:20 ` Javeed, Ashraf
2020-03-17 15:36 ` Ni, Ray
2020-04-20 13:22 ` Javeed, Ashraf
2020-04-21 6:03 ` Javeed, Ashraf
2020-04-21 6:22 ` Javeed, Ashraf
2020-05-08 8:26 ` Ni, Ray
[not found] ` <15D3127BE430E7DA.31784@groups.io>
2019-11-13 3:28 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 06/12] PciBusDxe: Integration of setup " Javeed, Ashraf
2019-12-17 11:59 ` Ni, Ray
2019-12-18 7:15 ` Javeed, Ashraf
[not found] ` <15D3127C6DFCD4A7.12315@groups.io>
2019-11-13 3:29 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 07/12] PciBusDxe: Record the PCI-Express Capability Structure Javeed, Ashraf
2019-12-17 12:03 ` Ni, Ray
2019-12-18 7:32 ` Javeed, Ashraf
[not found] ` <15D3127D273722D4.32624@groups.io>
2019-11-13 3:30 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 08/12] PciBusDxe: New PCI feature Max_Payload_Size Javeed, Ashraf
2019-12-18 8:38 ` Ni, Ray
2019-12-18 9:10 ` Ni, Ray
2019-12-18 14:35 ` Javeed, Ashraf
2019-12-19 2:14 ` Ni, Ray
[not found] ` <15D3127DA6E2D860.7420@groups.io>
2019-11-13 3:31 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 09/12] PciBusDxe: New PCI feature Max_Read_Req_Size Javeed, Ashraf
[not found] ` <15D3127E471DF360.32624@groups.io>
2019-11-13 3:32 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 10/12] PciBusDxe: New PCI feature Relax Ordering Javeed, Ashraf
[not found] ` <15D3127EB6ED8506.12315@groups.io>
2019-11-13 3:33 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 11/12] PciBusDxe: New PCI feature No-Snoop Javeed, Ashraf
[not found] ` <15D3127F5541064B.31784@groups.io>
2019-11-13 3:34 ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 12/12] PciBusDxe: New PCI feature Completion Timeout Javeed, Ashraf
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