From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.797.1577175348281553373 for ; Tue, 24 Dec 2019 00:15:48 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: ray.ni@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Dec 2019 00:15:47 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,350,1571727600"; d="scan'208";a="219728905" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga003.jf.intel.com with ESMTP; 24 Dec 2019 00:15:47 -0800 Received: from fmsmsx156.amr.corp.intel.com (10.18.116.74) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 24 Dec 2019 00:15:46 -0800 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by fmsmsx156.amr.corp.intel.com (10.18.116.74) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 24 Dec 2019 00:15:46 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.90]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.19]) with mapi id 14.03.0439.000; Tue, 24 Dec 2019 16:15:44 +0800 From: "Ni, Ray" To: "Wu, Hao A" , "devel@edk2.groups.io" CC: "Dong, Eric" , Laszlo Ersek , "Zeng, Star" , "Fu, Siyuan" , "Kinney, Michael D" Subject: Re: [PATCH v1 3/4] UefiCpuPkg: Add definitions for EDKII microcode patch HOB Thread-Topic: [PATCH v1 3/4] UefiCpuPkg: Add definitions for EDKII microcode patch HOB Thread-Index: AQHVufqnPubl/690IECz+4u7o6hnZKfI8BEg Date: Tue, 24 Dec 2019 08:15:44 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5C3AA107@SHSMSX104.ccr.corp.intel.com> References: <20191224013656.13404-1-hao.a.wu@intel.com> <20191224013656.13404-4-hao.a.wu@intel.com> In-Reply-To: <20191224013656.13404-4-hao.a.wu@intel.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: ray.ni@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable I suggest to let the DetectedPatchOffset points to the microcode header ins= tead of microcode data. Consumers can use the offset to get more information from header than just = the microcode data. > -----Original Message----- > From: Wu, Hao A > Sent: Tuesday, December 24, 2019 9:37 AM > To: devel@edk2.groups.io > Cc: Wu, Hao A ; Dong, Eric ; Ni, > Ray ; Laszlo Ersek ; Zeng, Star > ; Fu, Siyuan ; Kinney, Michael > D > Subject: [PATCH v1 3/4] UefiCpuPkg: Add definitions for EDKII microcode > patch HOB >=20 > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2430 >=20 > This commit will add the definitions for EDKII microcode patch HOB. >=20 > The intention of adding this HOB is to provide a scheme to store the belo= w > information: >=20 > A. The base address and size of the microcode patches that are being > loaded (from flash) into memory; > B. The information of applied microcode patch for each processor within > the system. >=20 > The producer of the HOB will be the UefiCpuPkg/MpInitLib (where the load, > detect and apply of the microcode happen). The consumer of the HOB can > be > modules that want to detect/apply the microcode patch by themselves again > later during the boot flow. >=20 > Cc: Eric Dong > Cc: Ray Ni > Cc: Laszlo Ersek > Cc: Star Zeng > Cc: Siyuan Fu > Cc: Michael D Kinney > Signed-off-by: Hao A Wu > --- > UefiCpuPkg/UefiCpuPkg.dec | 3 ++ > UefiCpuPkg/Include/Guid/MicrocodePatchHob.h | 50 > ++++++++++++++++++++ > 2 files changed, 53 insertions(+) >=20 > diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec > index 797f948631..45b267ac61 100644 > --- a/UefiCpuPkg/UefiCpuPkg.dec > +++ b/UefiCpuPkg/UefiCpuPkg.dec > @@ -63,6 +63,9 @@ [Guids] > ## Include/Guid/CpuFeaturesInitDone.h > gEdkiiCpuFeaturesInitDoneGuid =3D { 0xc77c3a41, 0x61ab, 0x4143, { 0x9= 8, > 0x3e, 0x33, 0x39, 0x28, 0x6, 0x28, 0xe5 }} >=20 > + ## Include/Guid/MicrocodePatchHob.h > + gEdkiiMicrocodePatchHobGuid =3D { 0xd178f11d, 0x8716, 0x418e, { 0xa= 1, > 0x31, 0x96, 0x7d, 0x2a, 0xc4, 0x28, 0x43 }} > + > [Protocols] > ## Include/Protocol/SmmCpuService.h > gEfiSmmCpuServiceProtocolGuid =3D { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x9= 4, > 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }} > diff --git a/UefiCpuPkg/Include/Guid/MicrocodePatchHob.h > b/UefiCpuPkg/Include/Guid/MicrocodePatchHob.h > new file mode 100644 > index 0000000000..3667fc3786 > --- /dev/null > +++ b/UefiCpuPkg/Include/Guid/MicrocodePatchHob.h > @@ -0,0 +1,50 @@ > +/** @file > + The microcode patch HOB is used to store the information of: > + A. Base address and size of the loaded microcode patches data; > + B. Applied microcode patch for each processor within system. > + > + Copyright (c) 2019, Intel Corporation. All rights reserved.
> + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the = BSD > License > + which accompanies this distribution. The full text of the license may= be > found at > + http://opensource.org/licenses/bsd-license.php. > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > + > +**/ > + > +#ifndef _MICROCODE_PATCH_HOB_H_ > +#define _MICROCODE_PATCH_HOB_H_ > + > +extern EFI_GUID gEdkiiMicrocodePatchHobGuid; > + > +// > +// The EDKII microcode patch HOB will be produced by MpInitLib and it ca= n > be > +// consumed by modules that want to detect/apply microcode patches. > +// > +typedef struct { > + // > + // The base address of the microcode patches data after being loaded i= nto > + // memory. > + // > + UINT64 MicrocodePatchAddress; > + // > + // The total size of the loaded microcode patches. > + // > + UINT64 MicrocodePatchRegionSize; > + // > + // The number of processors within the system. > + // > + UINT32 ProcessorNumber; > + // > + // An array with 'ProcessorNumber' elements that stores the offset (wi= th > + // regard to 'MicrocodePatchAddress') of the applied microcode patch f= or > each > + // processor. > + // If no microcode patch is applied for certain processor, the relatin= g > + // element will be set to MAX_UINT64. > + // > + UINT64 DetectedPatchOffset[0]; > +} EDKII_MICROCODE_PATCH_HOB; > + > +#endif > -- > 2.12.0.windows.1