From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web12.8896.1581420258336216549 for ; Tue, 11 Feb 2020 03:24:18 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: ray.ni@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Feb 2020 03:24:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,428,1574150400"; d="scan'208";a="227475545" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga008.fm.intel.com with ESMTP; 11 Feb 2020 03:24:16 -0800 Received: from shsmsx154.ccr.corp.intel.com (10.239.6.54) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 11 Feb 2020 03:24:15 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.5]) by SHSMSX154.ccr.corp.intel.com ([169.254.7.141]) with mapi id 14.03.0439.000; Tue, 11 Feb 2020 19:23:53 +0800 From: "Ni, Ray" To: "Fu, Siyuan" , "devel@edk2.groups.io" CC: "Dong, Eric" , Laszlo Ersek , "Kinney, Michael D" Subject: Re: [Patch 1/2] UefiCpuPkg: Remove FIT based microcode shadow logic from MpInitLib. Thread-Topic: [Patch 1/2] UefiCpuPkg: Remove FIT based microcode shadow logic from MpInitLib. Thread-Index: AQHV4AEhBhe3R0iE6Uek8Q0FdeLylqgV10AwgAAEFJA= Date: Tue, 11 Feb 2020 11:23:52 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5C42D762@SHSMSX104.ccr.corp.intel.com> References: <20200210105849.30472-1-siyuan.fu@intel.com> <20200210105849.30472-2-siyuan.fu@intel.com> <734D49CCEBEEF84792F5B80ED585239D5C42D6FF@SHSMSX104.ccr.corp.intel.com> In-Reply-To: <734D49CCEBEEF84792F5B80ED585239D5C42D6FF@SHSMSX104.ccr.corp.intel.com> Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: ray.ni@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable By the way, please rebase to the latest code when sending out the V2 patch. > -----Original Message----- > From: Ni, Ray > Sent: Tuesday, February 11, 2020 7:21 PM > To: Fu, Siyuan ; devel@edk2.groups.io > Cc: Dong, Eric ; Laszlo Ersek ; K= inney, Michael D > Subject: RE: [Patch 1/2] UefiCpuPkg: Remove FIT based microcode shadow lo= gic from MpInitLib. >=20 >=20 > > +typedef > > +EFI_STATUS > > +(EFIAPI *EDKII_PEI_SHADOW_MICROCODE) ( > > + IN EDKII_PEI_SHADOW_MICROCODE_PPI *This, > > + IN UINTN CpuIdCount, > > + IN EDKII_PEI_CPU_MICROCODE_ID *MicrocodeCpuId, >=20 > 1. How about CpuMicrocodeId or EDKII_PEI_MICROCODE_CPU_ID? > I'd like to keep the name and type be matched. >=20 >=20 > > + OUT UINTN *BufferSize, > > + OUT VOID **Buffer > 2. I remember that we offline discussed that Buffer/BufferSize are not ne= eded > to be part of the parameters. It can provide better flexibility that does= n't require > the microcode in memory is in continuous memory. > Why are they still in the parameters? >=20 > OK. I see now. Because EDKII_MICROCODE_PATCH_HOB contains below fields: > typedef struct { > UINT64 MicrocodePatchAddress; > UINT64 MicrocodePatchRegionSize; > ... > } EDKII_MICROCODE_PATCH_HOB; > which already restricts that the microcode in memory is in continuous mem= ory. >=20 > I'm ok with this. >=20 > > +EFI_STATUS > > +PlatformShadowMicrocode ( > > + IN OUT CPU_MP_DATA *CpuMpData > > + ) > > +{ > > + return EFI_NOT_FOUND; >=20 > 3. Can you add comments to say that microcode shadow > in DXE only supports the location identified by PCD? > 4. How about returning EFI_UNSUPPORTED?