From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mx.groups.io with SMTP id smtpd.web12.4442.1587554818266046640 for ; Wed, 22 Apr 2020 04:26:58 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.100, mailfrom: ray.ni@intel.com) IronPort-SDR: fNrEkAEKvnJPd8WMchdCLPPMKRbdrO2BtiokK+wwDH/vhxxxo16xxx3QFwhdp7KRdV1cX/MPmf 4WrJoYsDNaXw== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Apr 2020 04:26:57 -0700 IronPort-SDR: qQ3v61JslBztDkP50n4WlBajl8SzWq7aTByU1o6XmRFB5emzNQMWq3nIhuJoCU6dsfzTjeG8ii hj5a57t0rDHg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,414,1580803200"; d="scan'208";a="456471292" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga005.fm.intel.com with ESMTP; 22 Apr 2020 04:26:57 -0700 Received: from fmsmsx161.amr.corp.intel.com (10.18.125.9) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 22 Apr 2020 04:26:56 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX161.amr.corp.intel.com (10.18.125.9) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 22 Apr 2020 04:26:56 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.225]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.146]) with mapi id 14.03.0439.000; Wed, 22 Apr 2020 19:26:54 +0800 From: "Ni, Ray" To: "Dong, Eric" , "devel@edk2.groups.io" CC: Laszlo Ersek , "Kumar, Chandana C" Subject: Re: [PATCH 1/2] UefiCpuPkg/MpInitLib: Restore IDT context for APs. Thread-Topic: [PATCH 1/2] UefiCpuPkg/MpInitLib: Restore IDT context for APs. Thread-Index: AQHWGEZCRcbLgwRijUOYdPxGAtsV/6iEs/swgAAYBaCAADSQ4A== Date: Wed, 22 Apr 2020 11:26:54 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5C508753@SHSMSX104.ccr.corp.intel.com> References: <20200422013456.1053-1-eric.dong@intel.com> <20200422013456.1053-2-eric.dong@intel.com> <734D49CCEBEEF84792F5B80ED585239D5C508113@SHSMSX104.ccr.corp.intel.com> In-Reply-To: Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: ray.ni@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable >=20 > New logic changes code flow when CpuMpData->InitFlag =3D=3D ApInitReconfi= g. > In original flow, the code does RestoreVolatileRegisters and CpuFlushTlb,= but > new code only does CpuFlushTlb. > Is CpuFlushTlb not needs if wake up through Init-Sipi-Sipi? I prefer to = not > change this code flow. In ApInitReconfig path, CPU is waken up from INIT-SIPI-SIPI, which means th= e CR3 is set in waking up vector. CpuFlushTlb() is used here to invalidate th= e page table cache, which is similar to setting CR3.