From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web10.582.1587655060967703387 for ; Thu, 23 Apr 2020 08:17:41 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: ray.ni@intel.com) IronPort-SDR: 3HKSo3SlTLkRXtx8cUF53aWwPx7OMH5b8xOhoTgLCZXGI/HCxuRST4zyRh9aXTZ1BBJlR7P0i6 sOQRSNV+A+Lw== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2020 08:17:40 -0700 IronPort-SDR: OSVI3OZrrGP7DI5aEbIt8Fy9aHVbcAqxPvqq7MkVJsOe73ecMlaEa70tkEJjYlVBeockJcxyd8 DJsdQwpTvAng== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,307,1583222400"; d="scan'208";a="301243384" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by FMSMGA003.fm.intel.com with ESMTP; 23 Apr 2020 08:17:39 -0700 Received: from fmsmsx111.amr.corp.intel.com (10.18.116.5) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 23 Apr 2020 08:17:26 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx111.amr.corp.intel.com (10.18.116.5) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 23 Apr 2020 08:17:26 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.225]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.209]) with mapi id 14.03.0439.000; Thu, 23 Apr 2020 23:17:23 +0800 From: "Ni, Ray" To: Wasim Khan , "devel@edk2.groups.io" CC: "ard.biesheuvel@linaro.org" , Varun Sethi , "Wu, Hao A" Subject: Re: [edk2-devel] [PATCH] MdeModulePkg/PciHostBridge: Update Mem and PMem Limit Checks Thread-Topic: [edk2-devel] [PATCH] MdeModulePkg/PciHostBridge: Update Mem and PMem Limit Checks Thread-Index: AQHWGVwbXTEaHgr5wUWbkKbOVktonKiGkeqg//+iAwCAAI474P//gusAgACL4MA= Date: Thu, 23 Apr 2020 15:17:23 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5C50B156@SHSMSX104.ccr.corp.intel.com> References: <1587638612-13056-1-git-send-email-wasim.khan@nxp.com> <734D49CCEBEEF84792F5B80ED585239D5C50A98E@SHSMSX104.ccr.corp.intel.com> <734D49CCEBEEF84792F5B80ED585239D5C50AEFD@SHSMSX104.ccr.corp.intel.com> In-Reply-To: Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: ray.ni@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: Wasim Khan > Sent: Thursday, April 23, 2020 10:54 PM > To: devel@edk2.groups.io; Ni, Ray > Cc: ard.biesheuvel@linaro.org; Varun Sethi ; Wu, Hao A <= hao.a.wu@intel.com> > Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/PciHostBridge: Update Mem = and PMem Limit Checks > > > > > > > > Thanks for fixing the check. > > > > > > > > PCI_ROOT_BRIDGE_APERTURE.Base/Limit are device address while the > > > > memory space in GCD belongs to host domain. > > > > So, host address for Mem/Pmem should be below 4GB while device > > > > address can across 4GB. > > > > > > > > > > > > > Hi Ray, > > > Thank you for the review. > > > There are cases when we don't have PCIe host address below 4GB, and > > > the PCIe HOST Address space is only available above 4GB. > > > For Example, Mem: 40000000 - FFFFFFFF Translation=3DFFFFFF6000000000 > > > will result in HOST Address =3D 0xA0FFFFFFFF . This is a valid use ca= se, but below > > check will report ASSERT for this HOST ADDRESS. > > > > OK. Now I remember that "Mem" reports the 32bit memory space (device > > address) and "MemAbove4GB" reports the 64bit memory space (device addre= ss). > > > > Then if "Mem" reports memory range that across 4GB, it means the range = above > > 4GB should be reported through "MemAbove4GB". > > > Yes this is true, but some devices needs MMIO 32bit space only as per the= ir BAR property, including E1000 EP. I understand some devices contain only 32bit MMIO BAR so only 32bit memory = space (device address) can be assigned to them. Can you tell me the value of Mem/MemAbove4GB/Pmem/PmemAbove4GB in your real= case? Can you also tell me the PCI(e) device BAR information you want to initiali= ze through the EDKII PCI stack?