From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web10.6430.1591239985823007308 for ; Wed, 03 Jun 2020 20:06:25 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.136, mailfrom: ray.ni@intel.com) IronPort-SDR: CcEJQKp8xh/SpLZ7B103nCHcTyi3wJ00tNoZM9FhuKAr3674PceLsSZMm6GQeWJLcxaBH7qYqZ 7k2KKM555qoA== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jun 2020 20:06:14 -0700 IronPort-SDR: WjxnuOgAcoVGJePvgDyAdlCNGXN4zRLDCPVSvgLZERyzikWN5mldqt+FcHBDU1qaJQs6clDp/U +YSXvam9/dIA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,470,1583222400"; d="scan'208";a="378290724" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga001.fm.intel.com with ESMTP; 03 Jun 2020 20:06:12 -0700 Received: from fmsmsx115.amr.corp.intel.com (10.18.116.19) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 3 Jun 2020 20:06:05 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by fmsmsx115.amr.corp.intel.com (10.18.116.19) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 3 Jun 2020 20:06:05 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.161]) by shsmsx102.ccr.corp.intel.com ([169.254.2.36]) with mapi id 14.03.0439.000; Thu, 4 Jun 2020 11:06:04 +0800 From: "Ni, Ray" To: "Ma, Maurice" , "devel@edk2.groups.io" CC: "Dong, Guo" , "You, Benjamin" Subject: Re: [PATCH 2/2] UefiPayloadPkg/Pci: Use the PCIE Base Addr stored in AcpiBoardInfo HOB Thread-Topic: [PATCH 2/2] UefiPayloadPkg/Pci: Use the PCIE Base Addr stored in AcpiBoardInfo HOB Thread-Index: AQHWOZDLEkg/37xhX06cA0coBDPQ4qjHAlhwgADD40A= Date: Thu, 4 Jun 2020 03:06:04 +0000 Message-ID: <734D49CCEBEEF84792F5B80ED585239D5C59EEE8@SHSMSX104.ccr.corp.intel.com> References: <20200603102039.768-1-ray.ni@intel.com> <20200603102039.768-3-ray.ni@intel.com> In-Reply-To: Accept-Language: en-US, zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: ray.ni@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Maurice, 1. EFIAPI: sure. I will add the missing "EFIAPI". 2. ASSERT: Is below code to avoid dereferencing NULL pointer ok to you? ASSERT (Count !=3D NULL); + if (Count =3D=3D NULL) { + return NULL; + } Thanks, Ray > -----Original Message----- > From: Ma, Maurice > Sent: Wednesday, June 3, 2020 11:35 PM > To: Ni, Ray ; devel@edk2.groups.io > Cc: Dong, Guo ; You, Benjamin > Subject: RE: [PATCH 2/2] UefiPayloadPkg/Pci: Use the PCIE Base Addr store= d in AcpiBoardInfo HOB >=20 > Hi, Ray, >=20 > Thank you very much for making this change. >=20 > Two minor comments here, > - Should we add "EFIAPI" for function GetPciSegmentInfo() since it is sta= ndard library interface ? > - For ASSERT (Count !=3D NULL), can we have an error handling flow in = the code to deal with the case ? >=20 > Thanks > Maurice >=20 > > -----Original Message----- > > From: Ni, Ray > > Sent: Wednesday, June 3, 2020 3:21 > > To: devel@edk2.groups.io > > Cc: Ma, Maurice ; Dong, Guo ; > > You, Benjamin > > Subject: [PATCH 2/2] UefiPayloadPkg/Pci: Use the PCIE Base Addr stored = in > > AcpiBoardInfo HOB > > > > Today's UefiPayloadPkg always uses 0xE0000000 as the PCIE base address = and > > ignores the value set in AcpiBoardInfo HOB created by the boot loader. = This > > makes the payload binary cannot work in environment where the PCIE base > > address set by boot loader doesn't equal to 0xE0000000. > > > > The patch enhances UefiPayloadPkg so that the PCIE base address set by = boot > > loader in the AcpiBoardInfo HOB is used. > > > > Signed-off-by: Ray Ni > > Cc: Maurice Ma > > Cc: Guo Dong > > Cc: Benjamin You > > --- > > .../PciSegmentInfoLibAcpiBoardInfo.c | 55 +++++++++++++++++++ > > .../PciSegmentInfoLibAcpiBoardInfo.inf | 36 ++++++++++++ > > UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc | 6 +- > > 3 files changed, 95 insertions(+), 2 deletions(-) create mode 100644 > > UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLib= Ac > > piBoardInfo.c > > create mode 100644 > > UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLib= Ac > > piBoardInfo.inf > > > > diff --git > > a/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoL= ib > > AcpiBoardInfo.c > > b/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoL= ib > > AcpiBoardInfo.c > > new file mode 100644 > > index 0000000000..28ca4b5799 > > --- /dev/null > > +++ b/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentI= n > > +++ foLibAcpiBoardInfo.c > > @@ -0,0 +1,55 @@ > > +/** @file+ PCI Segment Information Library that returns one segment > > whose+ segment base address is retrieved from AcpiBoardInfo HOB.++ > > Copyright (c) 2020, Intel Corporation. All rights reserved.
+ SPDX-= License- > > Identifier: BSD-2-Clause-Patent++**/++#include +#include > > ++#include +#include > > +#include ++STATIC > > PCI_SEGMENT_INFO mPciSegment0 =3D {+ 0, // Segment number+ 0, // To= be > > fixed later+ 0, // Start bus number+ 255 // End bus number+};++/**+ = Return > > an array of PCI_SEGMENT_INFO holding the segment information.++ Note: = The > > returned array/buffer is owned by callee.++ @param Count Return the = count > > of segments.++ @retval A callee owned array holding the segment > > information.+**/+PCI_SEGMENT_INFO *+GetPciSegmentInfo (+ UINTN > > *Count+ )+{+ EFI_HOB_GUID_TYPE *GuidHob;+ ACPI_BOARD_INFO > > *AcpiBoardInfo;++ ASSERT (Count !=3D NULL);++ if (mPciSegment0.BaseAd= dress > > =3D=3D 0) {+ //+ // Find the acpi board information guid hob+ = //+ GuidHob =3D > > GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);+ ASSERT (GuidHob !=3D NUL= L);++ > > AcpiBoardInfo =3D (ACPI_BOARD_INFO *) GET_GUID_HOB_DATA (GuidHob);+ > > mPciSegment0.BaseAddress =3D AcpiBoardInfo->PcieBaseAddress;+ }+ *Cou= nt =3D > > 1;+ return &mPciSegment0;+}diff --git > > a/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoL= ib > > AcpiBoardInfo.inf > > b/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoL= ib > > AcpiBoardInfo.inf > > new file mode 100644 > > index 0000000000..ec4dbaaa55 > > --- /dev/null > > +++ b/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentI= n > > +++ foLibAcpiBoardInfo.inf > > @@ -0,0 +1,36 @@ > > +## @file+# PCI Segment Information Library that returns one segment > > whose+# segment base address is retrieved from AcpiBoardInfo HOB.+#+# > > Copyright (c) 2020, Intel Corporation. All rights reserved.
+#+# SP= DX- > > License-Identifier: BSD-2-Clause-Patent+#+#+##++[Defines]+ INF_VERSION > > =3D 0x00010005+ BASE_NAME =3D PciSegmentInfoLibAc= piBoardInfo+ > > FILE_GUID =3D 0EA82AA2-6C36-4FD5-BC90-FFA3ECB5E0CE= + > > MODULE_TYPE =3D BASE+ VERSION_STRING = =3D 1.0+ > > LIBRARY_CLASS =3D PciSegmentInfoLib | DXE_DRIVER++#+# = The > > following information is for reference only and not required by the bui= ld > > tools.+#+# VALID_ARCHITECTURES =3D IA32 X64 EBC+#++[Sources]= + > > PciSegmentInfoLibAcpiBoardInfo.c++[Packages]+ MdePkg/MdePkg.dec+ > > UefiPayloadPkg/UefiPayloadPkg.dec++[LibraryClasses]+ PcdLib+ HobLib+ > > DebugLibdiff --git a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc > > b/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc > > index 0736cd9954..e114039f82 100644 > > --- a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc > > +++ b/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc > > @@ -129,7 +129,8 @@ [LibraryClasses] > > PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf > > PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf !e= ndif- > > PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.= i > > nf+ > > PciSegmentLib|MdePkg/Library/PciSegmentLibSegmentInfo/BasePciSegmentLi > > bSegmentInfo.inf+ > > PciSegmentInfoLib|UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo= /Pc > > iSegmentInfoLibAcpiBoardInfo.inf > > PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePe= C > > offGetEntryPointLib.inf > > CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCache > > MaintenanceLib.inf@@ -288,7 +289,6 @@ [PcdsFixedAtBuild] > > gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable|TRUE > > gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, > > 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66,= 0x23, > > 0x31 } - > > gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|$(PCIE_BASE) !if > > $(SOURCE_DEBUG_ENABLE) > > gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2@ > > @ -360,6 +360,8 @@ [PcdsDynamicDefault] > > gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|31 > > gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|100 + > > gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|$(PCIE_BASE)+ > > ################################################################ > > ################ # # Components Section - list of all EDK II Modules ne= eded > > by this Platform.-- > > 2.26.2.windows.1 >=20