From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id ADD3B7803CE for ; Tue, 1 Aug 2023 22:18:02 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=o++IPXlO7ERaeRpFjmm4D7IZ5TRCossh0vq2Rcx1tK8=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1690928281; v=1; b=vC3PdEzgCs6XjkCKE4noJWbR51o3NnLl8SAqiRdP/gjKjNtibXvmk/d2WneWDCZdUmWEsbV+ HSDrWHFHahBOWfq/kaWglbvhXOrZMRr+7qo4vnIEUuaxpzq2nTb5nu4Fyt6tQN/tfw5+yut33MV 0CRWEgjlj8p+eGSRJRTLAfX0= X-Received: by 127.0.0.2 with SMTP id C0tkYY7687511xtFrkRRnlAz; Tue, 01 Aug 2023 15:18:01 -0700 X-Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by mx.groups.io with SMTP id smtpd.web10.1680.1690928275210547727 for ; Tue, 01 Aug 2023 15:17:59 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10789"; a="372157036" X-IronPort-AV: E=Sophos;i="6.01,248,1684825200"; d="scan'208";a="372157036" X-Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Aug 2023 15:17:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10789"; a="722637046" X-IronPort-AV: E=Sophos;i="6.01,248,1684825200"; d="scan'208";a="722637046" X-Received: from fmbiosdev02.amr.corp.intel.com ([10.105.221.44]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Aug 2023 15:17:58 -0700 From: "Saloni Kasbekar" To: devel@edk2.groups.io Cc: Saloni Kasbekar , Sai Chaganty , Nate DeSimone , Isaac Oram , Rosen Chuang Subject: [edk2-devel] [PATCH v2 6/6] AlderlakeOpenBoardPkg: Add Library Instances Date: Tue, 1 Aug 2023 15:17:45 -0700 Message-Id: <736833dcc688a5cd7fb05c388b7e8434a9414fb9.1690391944.git.saloni.kasbekar@intel.com> In-Reply-To: <6d497bd984f8a16be98d96042f3efea130be8a9c.1690391944.git.saloni.kasbekar@intel.com> References: <6d497bd984f8a16be98d96042f3efea130be8a9c.1690391944.git.saloni.kasbekar@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,saloni.kasbekar@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: SbbUT7G8T9a2Ys7Hhw2N3jqSx7686176AA= Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=vC3PdEzg; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Adds the following libraries - BasePlatformHookLib - PeiBoardConfigLib - PeiGetFvInfoLib - SmmSpiFlashCommonLib Cc: Sai Chaganty Cc: Nate DeSimone Cc: Isaac Oram Cc: Rosen Chuang Signed-off-by: Saloni Kasbekar --- .../BasePlatformHookLib/BasePlatformHookLib.c | 38 ++++ .../BasePlatformHookLib.inf | 44 ++++ .../PeiBoardConfigLib/PeiBoardConfigLib.c | 136 +++++++++++ .../PeiBoardConfigLib/PeiBoardConfigLib.inf | 56 +++++ .../Library/PeiGetFvInfoLib/PeiGetFvInfoLib.c | 89 ++++++++ .../PeiGetFvInfoLib/PeiGetFvInfoLib.inf | 34 +++ .../SmmSpiFlashCommonLib.inf | 49 ++++ .../SmmSpiFlashCommonLib/SpiFlashCommon.c | 215 ++++++++++++++++++ .../SpiFlashCommonSmmLib.c | 60 +++++ 9 files changed, 721 insertions(+) create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiBoardConfigLib.c create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiBoardConfigLib.inf create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiGetFvInfoLib/PeiGetFvInfoLib.c create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiGetFvInfoLib/PeiGetFvInfoLib.inf create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c b/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c new file mode 100644 index 0000000000..cccb1e18cc --- /dev/null +++ b/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c @@ -0,0 +1,38 @@ +/** @file + Platform Hook Library instances + + Copyright (c) 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include + + +/** + Performs platform specific initialization required for the CPU to access + the hardware associated with a SerialPortLib instance. This function does + not initialize the serial port hardware itself. Instead, it initializes + hardware devices that are required for the CPU to access the serial port + hardware. This function may be called more than once. + + @retval RETURN_SUCCESS The platform specific initialization succeeded. + @retval RETURN_DEVICE_ERROR The platform specific initialization could not be completed. + +**/ +RETURN_STATUS +EFIAPI +PlatformHookSerialPortInitialize ( + VOID + ) +{ + + // + // Enable I/O decoding for COM1(3F8h-3FFh), COM2(2F8h-2FFh), I/O port 2Eh/2Fh, 4Eh/4Fh, 60h/64Fh and 62h/66h. + // + PchLpcIoDecodeRangesSet (PcdGet16 (PcdLpcIoDecodeRange)); + PchLpcIoEnableDecodingSet (PcdGet16 (PchLpcIoEnableDecoding)); + + return RETURN_SUCCESS; +} diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf b/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf new file mode 100644 index 0000000000..b77724d5ab --- /dev/null +++ b/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf @@ -0,0 +1,44 @@ +### @file +# Platform Hook Library instance for Alderlake Mobile/Desktop CRB. +# +# Copyright (c) 2022, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +### + +[Defines] + INF_VERSION = 0x00010017 + BASE_NAME = BasePlatformHookLib + FILE_GUID = E22ADCC6-ED90-4A90-9837-C8E7FF9E963D + VERSION_STRING = 1.0 + MODULE_TYPE = BASE + LIBRARY_CLASS = PlatformHookLib +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = IA32 X64 IPF EBC +# + +[LibraryClasses] + BaseLib + IoLib + PciSegmentLib + PciLib + PchCycleDecodingLib + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + MinPlatformPkg/MinPlatformPkg.dec + AlderlakeOpenBoardPkg/OpenBoardPkg.dec + AlderlakeSiliconPkg/SiPkg.dec + +[Pcd] + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## CONSUMES + +[FixedPcd] + gBoardModuleTokenSpaceGuid.PcdLpcIoDecodeRange ## CONSUMES + gBoardModuleTokenSpaceGuid.PchLpcIoEnableDecoding ## CONSUMES + +[Sources] + BasePlatformHookLib.c diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiBoardConfigLib.c b/Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiBoardConfigLib.c new file mode 100644 index 0000000000..a9674bdd22 --- /dev/null +++ b/Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiBoardConfigLib.c @@ -0,0 +1,136 @@ +/** @file + Implementation of PeiBoardConfigLib. + + Copyright (c) 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + + +VOID +EFIAPI +InternalUpdateRvpBoardConfig ( + IN OUT UINT16 BoardId + ) +{ + // + // Update Board Type/Platform Type/Platform Flavor + // + switch (BoardId) { + case BoardIdAdlPDdr5Rvp: + if(PcdSet64S (PcdAcpiDefaultOemTableId, ACPI_OEM_TABLE_ID_ADL_P_M) != EFI_SUCCESS) + { + DEBUG ((DEBUG_INFO, "Set PcdAcpiDefaultOemTableId error!!!\n")); + } + break; + } + DEBUG ((DEBUG_INFO, "PcdAcpiDefaultOemTableId is 0x%llX\n", PcdGet64 (PcdAcpiDefaultOemTableId))); +} + +/** + Procedure to detect current board HW configuration. + +**/ +VOID +GetBoardConfig ( + VOID + ) +{ + UINT16 BoardId; + + // + // Get Platform Info and fill the PCD + // + BoardId = BoardIdAdlPDdr5Rvp; + PcdSet16S (PcdBoardId, BoardId); + // + // update RVP board config + // + InternalUpdateRvpBoardConfig (BoardId); + + DEBUG ((DEBUG_INFO, "Platform Information:\n")); + DEBUG ((DEBUG_INFO, "BoardID: 0x%x\n", BoardId)); + +} + +/** + Count the number of GPIO settings in the Table. + + @param[in] GpioTable The pointer of GPIO config table + @param[out] GpioCount The number of GPIO config entries +**/ +VOID +GetGpioTableSize ( + GPIO_INIT_CONFIG *GpioTable, + OUT UINT16 *GpioCount + ) +{ + *GpioCount = 0; + if(GpioTable != NULL) { + while (GpioTable[*GpioCount].GpioPad != 0 && *GpioCount < MAX_GPIO_PINS) { + DEBUG ((DEBUG_INFO, "GpioTable[%d]->GpioPad = %x \n", *GpioCount, GpioTable[*GpioCount].GpioPad)); + (*GpioCount) ++; + } + } else { + DEBUG ((DEBUG_INFO, "GpioTable is NULL\n")); + } + DEBUG ((DEBUG_INFO, "GetGpioTableSize() GpioCount = %d\n", *GpioCount)); +} + +/** + Configures GPIO + + @param[in] GpioTable Point to Platform Gpio table + @param[in] GpioTableCount Number of Gpio table entries +**/ +STATIC +VOID +ConfigureGpio ( + IN GPIO_INIT_CONFIG *GpioTable, + IN UINT16 GpioTableCount + ) +{ + EFI_STATUS Status; + + DEBUG ((DEBUG_INFO, "ConfigureGpio() Start\n")); + + Status = GpioConfigurePads (GpioTableCount, GpioTable); + ASSERT_EFI_ERROR (Status); + + DEBUG ((DEBUG_INFO, "ConfigureGpio() End\n")); +} + +/** + Configure GPIO Before Memory is initialized. + + @param[in] GpioTable Pointer to Gpio table +**/ +VOID +GpioInit ( + IN GPIO_INIT_CONFIG *GpioTable + ) +{ + UINT16 GpioCount; + + if (GpioTable != 0) { + GpioCount = 0; + GetGpioTableSize (GpioTable, &GpioCount); + if (GpioCount != 0) { + ConfigureGpio ((VOID *) GpioTable, (UINTN) GpioCount); + } + } +} diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiBoardConfigLib.inf b/Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiBoardConfigLib.inf new file mode 100644 index 0000000000..1f78e9a0ba --- /dev/null +++ b/Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiBoardConfigLib.inf @@ -0,0 +1,56 @@ +### @file +# Component information file for BaseBoardConfigLib. +# +# Copyright (c) 2022, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +### + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = PeiBoardConfigLib + FILE_GUID = AA9812A8-1BA6-40AD-A846-50D0BC29C38C + MODULE_TYPE = PEIM + VERSION_STRING = 1.0 + LIBRARY_CLASS = BoardConfigLib|PEIM + +[LibraryClasses] + DebugLib + PcdLib + PostCodeLib + TimerLib + PeiServicesLib + PmcLib + GpioLib + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + AlderlakeSiliconPkg/SiPkg.dec + AlderlakeOpenBoardPkg/OpenBoardPkg.dec + +[Sources] + PeiBoardConfigLib.c + +[Ppis] + gEfiPeiReadOnlyVariable2PpiGuid ## CONSUMES + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId ## PRODUCES ## CONSUMES + gBoardModuleTokenSpaceGuid.PcdBoardId ## PRODUCES ## CONSUMES + gBoardModuleTokenSpaceGuid.PcdBoardBomId ## PRODUCES ## CONSUMES + gBoardModuleTokenSpaceGuid.PcdBoardRev ## PRODUCES ## CONSUMES + gBoardModuleTokenSpaceGuid.PcdSpdPresent ## PRODUCES ## CONSUMES + + # GPIO Group Tier + gBoardModuleTokenSpaceGuid.PcdGpioGroupToGpeDw0 + gBoardModuleTokenSpaceGuid.PcdGpioGroupToGpeDw1 + gBoardModuleTokenSpaceGuid.PcdGpioGroupToGpeDw2 + + gBoardModuleTokenSpaceGuid.PcdDisableVpdGpioTable + gBoardModuleTokenSpaceGuid.PcdBoardGpioTable + gBoardModuleTokenSpaceGuid.PcdBoardGpioTablePreMem + gBoardModuleTokenSpaceGuid.PcdBoardGpioTableEarlyPreMem + +[Depex] + gEfiPeiReadOnlyVariable2PpiGuid diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiGetFvInfoLib/PeiGetFvInfoLib.c b/Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiGetFvInfoLib/PeiGetFvInfoLib.c new file mode 100644 index 0000000000..d9ed1c5064 --- /dev/null +++ b/Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiGetFvInfoLib/PeiGetFvInfoLib.c @@ -0,0 +1,89 @@ +/** @file + Helper Library for PEI Graphics PEIM + + Copyright (c) 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include + +/** + PeiGetSectionFromFv finds the file in FV and gets file Address and Size + + @param[in] NameGuid - File GUID + @param[out] Address - Pointer to the File Address + @param[out] Size - Pointer to File Size + + @retval EFI_SUCCESS Successfull in reading the section from FV + @retval EFI_NOT_FOUND File not found +**/ +EFI_STATUS +EFIAPI +PeiGetSectionFromFv ( + IN CONST EFI_GUID NameGuid, + OUT VOID **Address, + OUT UINT32 *Size + ) +{ + EFI_STATUS Status; + EFI_PEI_FIRMWARE_VOLUME_PPI *FvPpi; + EFI_FV_FILE_INFO FvFileInfo; + PEI_CORE_FV_HANDLE *CoreFvHandle; + EFI_PEI_FILE_HANDLE FileHandle; + EFI_GUID *FileGuid; + EFI_COMMON_SECTION_HEADER *Section; + EFI_HOB_GUID_TYPE *GuidHob; + VOID *HobData; + + Status = PeiServicesLocatePpi( + &gEfiFirmwareFileSystem2Guid, + 0, + NULL, + (VOID **)&FvPpi + ); + ASSERT_EFI_ERROR(Status); + + GuidHob = GetFirstGuidHob (&gPlatformInitFvLocationGuid); + if (GuidHob != NULL) { + HobData = *(VOID **)GET_GUID_HOB_DATA(GuidHob); + CoreFvHandle = (PEI_CORE_FV_HANDLE *) HobData; + + // + // File typically resides in current FV or previous FV, so searching both of them. + // + Status = FvPpi->FindFileByName (FvPpi, &NameGuid, &CoreFvHandle->FvHandle, &FileHandle); + + if (!EFI_ERROR(Status) && FileHandle != NULL) { + + DEBUG((DEBUG_INFO, "Find SectionByType \n")); + + Status = FvPpi->FindSectionByType(FvPpi, EFI_SECTION_RAW, FileHandle, (VOID **)&FileGuid); + if (!EFI_ERROR(Status)) { + + DEBUG((DEBUG_INFO, "GetFileInfo \n")); + + Status = FvPpi->GetFileInfo(FvPpi, FileHandle, &FvFileInfo); + Section = (EFI_COMMON_SECTION_HEADER *)FvFileInfo.Buffer; + + if (IS_SECTION2(Section)) { + ASSERT(SECTION2_SIZE(Section) > 0x00FFFFFF); + *Size = SECTION2_SIZE(Section) - sizeof (EFI_COMMON_SECTION_HEADER2); + *Address = ((UINT8 *)Section + sizeof (EFI_COMMON_SECTION_HEADER2)); + } else { + *Size = SECTION_SIZE(Section) - sizeof (EFI_COMMON_SECTION_HEADER); + *Address = ((UINT8 *)Section + sizeof (EFI_COMMON_SECTION_HEADER)); + } + return EFI_SUCCESS; + } + } + } else { + DEBUG ((DEBUG_INFO, "Hob not found\n")); + } + return EFI_NOT_FOUND; +} diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiGetFvInfoLib/PeiGetFvInfoLib.inf b/Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiGetFvInfoLib/PeiGetFvInfoLib.inf new file mode 100644 index 0000000000..1701fb15fe --- /dev/null +++ b/Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiGetFvInfoLib/PeiGetFvInfoLib.inf @@ -0,0 +1,34 @@ +### @file +# Component description file for PeiGetFvInfo library. +# +# Copyright (c) 2022, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +### + +[Defines] + INF_VERSION = 0x00010017 + BASE_NAME = PeiGetFvInfoLib + FILE_GUID = C2584BE4-2CCD-418C-9205-A2031CE75861 + VERSION_STRING = 1.0 + MODULE_TYPE = PEIM + LIBRARY_CLASS = PeiGetFvInfoLib + +[LibraryClasses] + BaseMemoryLib + BaseLib + DebugLib + DebugPrintErrorLevelLib + HobLib + PeiServicesLib + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + AlderlakeOpenBoardPkg/OpenBoardPkg.dec + +[Sources] + PeiGetFvInfoLib.c + +[Guids] + gPlatformInitFvLocationGuid ## CONSUMES diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf b/Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf new file mode 100644 index 0000000000..cf6ca0d0ab --- /dev/null +++ b/Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf @@ -0,0 +1,49 @@ +### @file +# SMM Library instance of Spi Flash Common Library Class +# +# Copyright (c) 2022, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +### + +[Defines] + INF_VERSION = 0x00010017 + BASE_NAME = SmmSpiFlashCommonLib + FILE_GUID = 9632D96E-E849-4217-9217-DC500B8AAE47 + VERSION_STRING = 1.0 + MODULE_TYPE = DXE_SMM_DRIVER + LIBRARY_CLASS = SpiFlashCommonLib|DXE_SMM_DRIVER + CONSTRUCTOR = SmmSpiFlashCommonLibConstructor +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = IA32 X64 +# + +[LibraryClasses] + IoLib + MemoryAllocationLib + BaseLib + UefiLib + SmmServicesTableLib + BaseMemoryLib + DebugLib + +[Packages] + MdePkg/MdePkg.dec + AlderlakeSiliconPkg/SiPkg.dec + AlderlakeOpenBoardPkg/OpenBoardPkg.dec + +[Pcd] + gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES + gSiPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES + +[Sources] + SpiFlashCommonSmmLib.c + SpiFlashCommon.c + +[Protocols] + gPchSmmSpiProtocolGuid ## CONSUMES + +[Depex.X64.DXE_SMM_DRIVER] + gPchSmmSpiProtocolGuid diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c b/Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c new file mode 100644 index 0000000000..3f7c52ac73 --- /dev/null +++ b/Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c @@ -0,0 +1,215 @@ +/** @file + Wrap EFI_SPI_PROTOCOL to provide some library level interfaces + for module use. + + Copyright (c) 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + + +**/ + +#include +#include + +PCH_SPI_PROTOCOL *mSpiProtocol; + +// +// Variables for boottime and runtime usage. +// +UINTN mBiosAreaBaseAddress = 0; +UINTN mBiosSize = 0; +UINTN mBiosOffset = 0; + +/** + Enable block protection on the Serial Flash device. + + @retval EFI_SUCCESS Operation is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashLock ( + VOID + ) +{ + EFI_STATUS Status; + + Status = EFI_SUCCESS; + + return Status; +} + +/** + Read NumBytes bytes of data from the address specified by + PAddress into Buffer. + + @param[in] Address The starting physical address of the read. + @param[in,out] NumBytes On input, the number of bytes to read. On output, the number + of bytes actually read. + @param[out] Buffer The destination data buffer for the read. + + @retval EFI_SUCCESS Operation is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashRead ( + IN UINTN Address, + IN OUT UINT32 *NumBytes, + OUT UINT8 *Buffer + ) +{ + ASSERT ((NumBytes != NULL) && (Buffer != NULL)); + if ((NumBytes == NULL) || (Buffer == NULL)) { + return EFI_INVALID_PARAMETER; + } + + // + // This function is implemented specifically for those platforms + // at which the SPI device is memory mapped for read. So this + // function just do a memory copy for Spi Flash Read. + // + CopyMem (Buffer, (VOID *) Address, *NumBytes); + + return EFI_SUCCESS; +} + +/** + Write NumBytes bytes of data from Buffer to the address specified by + PAddresss. + + @param[in] Address The starting physical address of the write. + @param[in,out] NumBytes On input, the number of bytes to write. On output, + the actual number of bytes written. + @param[in] Buffer The source data buffer for the write. + + @retval EFI_SUCCESS Operation is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + @retval EFI_INVALID_PARAMETER Invalid parameter. + @retval EFI_BAD_BUFFER_SIZE DataSectionSize in BGUP header exceeds the + size ofBIOS Guard script buffer + +**/ +EFI_STATUS +EFIAPI +SpiFlashWrite ( + IN UINTN Address, + IN OUT UINT32 *NumBytes, + IN UINT8 *Buffer + ) +{ + EFI_STATUS Status; + UINTN Offset; + UINT32 Length; + UINT32 RemainingBytes; + + ASSERT ((NumBytes != NULL) && (Buffer != NULL)); + if ((NumBytes == NULL) || (Buffer == NULL)) { + return EFI_INVALID_PARAMETER; + } + + ASSERT (Address >= mBiosAreaBaseAddress); + if (Address < mBiosAreaBaseAddress) { + return EFI_INVALID_PARAMETER; + } + + Offset = Address - mBiosAreaBaseAddress; + + ASSERT ((*NumBytes + Offset) <= mBiosSize); + if ((*NumBytes + Offset) > mBiosSize) { + return EFI_INVALID_PARAMETER; + } + + Status = EFI_SUCCESS; + RemainingBytes = *NumBytes; + + while (RemainingBytes > 0) { + if (RemainingBytes > SECTOR_SIZE_4KB) { + Length = SECTOR_SIZE_4KB; + } else { + Length = RemainingBytes; + } + Status = mSpiProtocol->FlashWrite ( + mSpiProtocol, + FlashRegionBios, + (UINT32) Offset, + Length, + Buffer + ); + if (EFI_ERROR (Status)) { + break; + } + RemainingBytes -= Length; + Offset += Length; + Buffer += Length; + } + + // + // Actual number of bytes written + // + *NumBytes -= RemainingBytes; + + return Status; +} + +/** + Erase the block starting at Address. + + @param[in] Address The starting physical address of the block to be erased. + This library assume that caller garantee that the PAddress + is at the starting address of this block. + @param[in] NumBytes On input, the number of bytes of the logical block to be erased. + On output, the actual number of bytes erased. + + @retval EFI_SUCCESS. Operation is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + @retval EFI_INVALID_PARAMETER Invalid parameter. + +**/ +EFI_STATUS +EFIAPI +SpiFlashBlockErase ( + IN UINTN Address, + IN UINTN *NumBytes + ) +{ + EFI_STATUS Status; + UINTN Offset; + UINTN RemainingBytes; + + ASSERT (NumBytes != NULL); + if (NumBytes == NULL) { + return EFI_INVALID_PARAMETER; + } + + ASSERT (Address >= mBiosAreaBaseAddress); + if (Address < mBiosAreaBaseAddress) { + return EFI_INVALID_PARAMETER; + } + + Offset = Address - mBiosAreaBaseAddress; + + ASSERT ((*NumBytes % SECTOR_SIZE_4KB) == 0); + if ((*NumBytes % SECTOR_SIZE_4KB) != 0) { + return EFI_INVALID_PARAMETER; + } + + ASSERT ((*NumBytes + Offset) <= mBiosSize); + if ((*NumBytes + Offset) > mBiosSize) { + return EFI_INVALID_PARAMETER; + } + + Status = EFI_SUCCESS; + RemainingBytes = *NumBytes; + + Status = mSpiProtocol->FlashErase ( + mSpiProtocol, + FlashRegionBios, + (UINT32) Offset, + (UINT32) RemainingBytes + ); + return Status; +} + diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c b/Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c new file mode 100644 index 0000000000..897d85743a --- /dev/null +++ b/Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c @@ -0,0 +1,60 @@ +/** @file + SMM Library instance of SPI Flash Common Library Class + + Copyright (c) 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + + +**/ + +#include +#include + +extern PCH_SPI_PROTOCOL *mSpiProtocol; + +extern UINTN mBiosAreaBaseAddress; +extern UINTN mBiosSize; +extern UINTN mBiosOffset; + +/** + The library constructuor. + + The function does the necessary initialization work for this library + instance. + + @param[in] ImageHandle The firmware allocated handle for the UEFI image. + @param[in] SystemTable A pointer to the EFI system table. + + @retval EFI_SUCCESS The function always return EFI_SUCCESS for now. + It will ASSERT on error for debug version. + @retval EFI_ERROR Please reference LocateProtocol for error code details. +**/ +EFI_STATUS +EFIAPI +SmmSpiFlashCommonLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + UINT32 BaseAddr; + UINT32 RegionSize; + + mBiosAreaBaseAddress = (UINTN) PcdGet32 (PcdBiosAreaBaseAddress); + mBiosSize = (UINTN) PcdGet32 (PcdBiosSize); + + // + // Locate the SMM SPI protocol. + // + Status = gSmst->SmmLocateProtocol ( + &gPchSmmSpiProtocolGuid, + NULL, + (VOID **) &mSpiProtocol + ); + ASSERT_EFI_ERROR (Status); + + mSpiProtocol->GetRegionAddress (mSpiProtocol, FlashRegionBios, &BaseAddr, &RegionSize); + mBiosOffset = BaseAddr; + + return Status; +} -- 2.36.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#107435): https://edk2.groups.io/g/devel/message/107435 Mute This Topic: https://groups.io/mt/100494313/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-