From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DFE351A1E5E for ; Fri, 26 Aug 2016 15:54:56 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP; 26 Aug 2016 15:54:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,583,1464678000"; d="scan'208";a="1042092083" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga002.jf.intel.com with ESMTP; 26 Aug 2016 15:54:49 -0700 Received: from fmsmsx116.amr.corp.intel.com (10.18.116.20) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 26 Aug 2016 15:47:34 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by fmsmsx116.amr.corp.intel.com (10.18.116.20) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 26 Aug 2016 15:47:33 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.147]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.8]) with mapi id 14.03.0248.002; Sat, 27 Aug 2016 06:47:31 +0800 From: "Yao, Jiewen" To: "Mudusuru, Giri P" , "edk2-devel@lists.01.org" CC: "Kinney, Michael D" Thread-Topic: [edk2] [PATCH] IntelSiliconPkg: Add Firmware Interface Table (FIT) definitions Thread-Index: AQHR/+ZAxiwQoxr+zk6hLGB+e4XS76Bb169w Date: Fri, 26 Aug 2016 22:47:31 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C500280A1B5@shsmsx102.ccr.corp.intel.com> References: In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] IntelSiliconPkg: Add Firmware Interface Table (FIT) definitions X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Aug 2016 22:54:57 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Jiewen.Yao@intel.com > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Giri P Mudusuru > Sent: Saturday, August 27, 2016 6:07 AM > To: edk2-devel@lists.01.org > Cc: Kinney, Michael D ; Yao, Jiewen > > Subject: [edk2] [PATCH] IntelSiliconPkg: Add Firmware Interface Table (FI= T) > definitions >=20 > Adding Processor Firmware Interface Table (FIT) related defines & structu= res >=20 > Cc: Jiewen Yao > Cc: Michael Kinney > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Giri P Mudusuru > --- > .../IndustryStandard/FirmwareInterfaceTable.h | 75 > ++++++++++++++++++++++ > 1 file changed, 75 insertions(+) > create mode 100644 > IntelSiliconPkg/Include/IndustryStandard/FirmwareInterfaceTable.h >=20 > diff --git > a/IntelSiliconPkg/Include/IndustryStandard/FirmwareInterfaceTable.h > b/IntelSiliconPkg/Include/IndustryStandard/FirmwareInterfaceTable.h > new file mode 100644 > index 0000000..ea54578 > --- /dev/null > +++ b/IntelSiliconPkg/Include/IndustryStandard/FirmwareInterfaceTable.h > @@ -0,0 +1,75 @@ > +/** @file > + FirmwareInterfaceTable (FIT) related definitions. > + > + @todo: update document/spec reference > + > + Copyright (c) 2016, Intel Corporation. All rights reserved.
> + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the > BSD License > + which accompanies this distribution. The full text of the license may= be > found at > + http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > + > +**/ > + > +#ifndef __FIRMWARE_INTERFACE_TABLE_H__ > +#define __FIRMWARE_INTERFACE_TABLE_H__ > + > +// > +// FIT Entry type definitions > +// > +#define FIT_TYPE_00_HEADER 0x00 > +#define FIT_TYPE_01_MICROCODE 0x01 > +#define FIT_TYPE_02_STARTUP_ACM 0x02 > +#define FIT_TYPE_07_BIOS_STARTUP_MODULE 0x07 > +#define FIT_TYPE_08_TPM_POLICY 0x08 > +#define FIT_TYPE_09_BIOS_POLICY 0x09 > +#define FIT_TYPE_0A_TXT_POLICY 0x0A > +#define FIT_TYPE_0B_KEY_MANIFEST 0x0B > +#define FIT_TYPE_0C_BOOT_POLICY_MANIFEST 0x0C > +#define FIT_TYPE_10_CSE_SECURE_BOOT 0x10 > +#define FIT_TYPE_2D_TXTSX_POLICY 0x2D > +#define FIT_TYPE_2F_JMP_DEBUG_POLICY 0x2F > +#define FIT_TYPE_7F_SKIP 0x7F > + > +#define FIT_POINTER_ADDRESS 0xFFFFFFC0 ///< Fixed > address at 4G - 40h > + > +#define FIT_TYPE_VERSION 0x0100 > + > +#define FIT_TYPE_00_SIGNATURE SIGNATURE_64 ('_', 'F', 'I', 'T', '_', ' = ', ' ', > ' ') > + > +#pragma pack(push, 1) > + > +typedef struct { > + /** > + Address is the base address of the firmware component > + must be aligned on 16 byte boundary > + **/ > + UINT64 Address; > + UINT8 Size[3]; ///< Size is the span of the component in multiple o= f > 16 bytes > + UINT8 Reserved; ///< Reserved must be set to 0 > + /** > + Component's version number in binary coded decimal (BCD) format. > + For the FIT header entry, the value in this field will indicate the = revision > + number of the FIT data structure. The upper byte of the revision fie= ld > + indicates the major revision and the lower byte indicates the minor > revision. > + **/ > + UINT16 Version; > + UINT8 Type : 7; ///< FIT types 0x00 to 0x7F > + /// > + /// Checksum Valid indicates whether component has valid checksum. > + /// > + UINT8 C_V : 1; > + /** > + Component's checksum. The modulo sum of all the bytes in the > component and > + the value in this field (Chksum) must add up to zero. This field is = only > + valid if the C_V flag is non-zero. > + **/ > + UINT8 Chksum; > +} FIRMWARE_INTERFACE_TABLE_ENTRY; > + > +#pragma pack(pop) > + > +#endif > -- > 2.9.0.windows.1 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel