From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BA5F31A1E30 for ; Tue, 11 Oct 2016 22:10:11 -0700 (PDT) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP; 11 Oct 2016 22:10:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,332,1473145200"; d="scan'208";a="18707232" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga005.fm.intel.com with ESMTP; 11 Oct 2016 22:10:11 -0700 Received: from fmsmsx156.amr.corp.intel.com (10.18.116.74) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.248.2; Tue, 11 Oct 2016 22:10:11 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx156.amr.corp.intel.com (10.18.116.74) with Microsoft SMTP Server (TLS) id 14.3.248.2; Tue, 11 Oct 2016 22:10:10 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.206]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.2]) with mapi id 14.03.0248.002; Wed, 12 Oct 2016 13:10:09 +0800 From: "Yao, Jiewen" To: "Mudusuru, Giri P" , "edk2-devel@lists.01.org" Thread-Topic: [edk2] [PATCH] IntelSiliconPkg: Fixing syntax bug in IGD_OPREGION_HEADER Thread-Index: AQHSJEZ8/AlCjl1j8Ea9rkikjvlTPaCkRTZw Date: Wed, 12 Oct 2016 05:10:08 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C50386B0082@shsmsx102.ccr.corp.intel.com> References: <2503a66472539eb7d50b87fa5bb88ef325cb72d7.1476248642.git.giri.p.mudusuru@intel.com> In-Reply-To: <2503a66472539eb7d50b87fa5bb88ef325cb72d7.1476248642.git.giri.p.mudusuru@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] IntelSiliconPkg: Fixing syntax bug in IGD_OPREGION_HEADER X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 12 Oct 2016 05:10:12 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: jiewen.yao@intel.com > -----Original Message----- > From: Mudusuru, Giri P > Sent: Wednesday, October 12, 2016 1:07 PM > To: edk2-devel@lists.01.org > Cc: Yao, Jiewen > Subject: [edk2] [PATCH] IntelSiliconPkg: Fixing syntax bug in > IGD_OPREGION_HEADER >=20 > Added missing ; for DVER in IGD_OPREGION_HEADER >=20 > Cc: Jiewen Yao > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Giri P Mudusuru > --- > IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >=20 > diff --git a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h > b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h > index 4d5637c..c66a452 100644 > --- a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h > +++ b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h > @@ -50,7 +50,7 @@ typedef struct { > UINT32 MBOX; ///< Offset 0x58 Supported Mailboxes > UINT32 DMOD; ///< Offset 0x5C Driver Model > UINT32 PCON; ///< Offset 0x60 Platform Configuration > - CHAR16 DVER[0x10] ///< Offset 0x64 GOP Version > + CHAR16 DVER[0x10]; ///< Offset 0x64 GOP Version > UINT8 RM01[0x7C]; ///< Offset 0x84 Reserved Must be zero > } IGD_OPREGION_HEADER; >=20 > -- > 2.9.0.windows.1