From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 832AE1A1E3C for ; Tue, 18 Oct 2016 00:37:35 -0700 (PDT) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP; 18 Oct 2016 00:37:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,361,1473145200"; d="scan'208";a="180913836" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga004.fm.intel.com with ESMTP; 18 Oct 2016 00:36:54 -0700 Received: from fmsmsx119.amr.corp.intel.com (10.18.124.207) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.248.2; Tue, 18 Oct 2016 00:36:54 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by FMSMSX119.amr.corp.intel.com (10.18.124.207) with Microsoft SMTP Server (TLS) id 14.3.248.2; Tue, 18 Oct 2016 00:36:53 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.206]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.96]) with mapi id 14.03.0248.002; Tue, 18 Oct 2016 15:36:50 +0800 From: "Yao, Jiewen" To: "Mudusuru, Giri P" , "edk2-devel@lists.01.org" Thread-Topic: [edk2] [PATCH] IntelSiliconPkg: Fixed bug in IgdOpregion spec Thread-Index: AQHSKO7sV7dIyaKfD0CynIP59IDg66Ct0t1g Date: Tue, 18 Oct 2016 07:36:50 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C50386B2D76@shsmsx102.ccr.corp.intel.com> References: In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] IntelSiliconPkg: Fixed bug in IgdOpregion spec X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Oct 2016 07:37:35 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: jiewen.yao@intel.com > -----Original Message----- > From: Mudusuru, Giri P > Sent: Tuesday, October 18, 2016 11:23 AM > To: edk2-devel@lists.01.org > Cc: Yao, Jiewen > Subject: [edk2] [PATCH] IntelSiliconPkg: Fixed bug in IgdOpregion spec >=20 > Spec documents Mailbox3 - RM31 size as 0x45(69) instead of 0x46(70) >=20 > Cc: Jiewen Yao > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Giri P Mudusuru > --- > IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) >=20 > diff --git a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h > b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h > index c66a452..fd6f813 100644 > --- a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h > +++ b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h > @@ -4,6 +4,8 @@ >=20 >=20 > https://01.org/sites/default/files/documentation/skl_opregion_rev0p5.pdf >=20 > + @note Fixed bug in the spec Mailbox3 - RM31 size from 0x45(69) to > 0x46(70) > + > Copyright (c) 2016, Intel Corporation. All rights reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the > BSD License > @@ -116,7 +118,7 @@ typedef struct { > UINT64 FDSS; ///< Offset 0x3AA DSS Buffer address allocated > for IFFS feature > UINT32 FDSP; ///< Offset 0x3B2 Size of DSS buffer > UINT32 STAT; ///< Offset 0x3B6 State Indicator > - UINT8 RM31[0x45]; ///< Offset 0x3BA - 0x3FF Reserved Must be > zero > + UINT8 RM31[0x46]; ///< Offset 0x3BA - 0x3FF Reserved Must be > zero. Bug in spec 0x45(69) > } IGD_OPREGION_MBOX3; >=20 > /// > -- > 2.9.0.windows.1