public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
From: "Yao, Jiewen" <jiewen.yao@intel.com>
To: "Dong, Guo" <guo.dong@intel.com>,
	"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Subject: Re: [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete.
Date: Wed, 26 Oct 2016 02:47:08 +0000	[thread overview]
Message-ID: <74D8A39837DF1E4DA445A8C0B3885C50386B7600@shsmsx102.ccr.corp.intel.com> (raw)
In-Reply-To: <0DE6ECBAEEB99B4DA9564FF580F3580A0D2C4D0D@fmsmsx120.amr.corp.intel.com>

Yes, I will do that. ☺

From: Dong, Guo
Sent: Wednesday, October 26, 2016 7:56 AM
To: Yao, Jiewen <jiewen.yao@intel.com>; edk2-devel@lists.01.org
Cc: Mudusuru, Giri P <giri.p.mudusuru@intel.com>; Ma, Maurice <maurice.ma@intel.com>
Subject: RE: [edk2] [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete.

Hi Jiewen,

Thank you catch this issue. I have sent an updated patch for it.
Could you help check it in if there is no other comments? Since I don't have write access.

Thanks,
Guo

-----Original Message-----
From: Yao, Jiewen
Sent: Tuesday, October 25, 2016 4:32 PM
To: Dong, Guo <guo.dong@intel.com<mailto:guo.dong@intel.com>>; edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org>
Cc: Mudusuru, Giri P <giri.p.mudusuru@intel.com<mailto:giri.p.mudusuru@intel.com>>; Ma, Maurice <maurice.ma@intel.com<mailto:maurice.ma@intel.com>>
Subject: RE: [edk2] [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete.

I found the comment section has unreadable char. I think it should be "-".

We need update it to be readable asci char.
With that change, reviewed-by: jiewen.yao@intel.com<mailto:jiewen.yao@intel.com>

> -----Original Message-----
> From: Dong, Guo
> Sent: Tuesday, October 25, 2016 11:33 PM
> To: edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org>
> Cc: Yao, Jiewen <jiewen.yao@intel.com<mailto:jiewen.yao@intel.com>>; Mudusuru, Giri P
> <giri.p.mudusuru@intel.com<mailto:giri.p.mudusuru@intel.com>>; Ma, Maurice <maurice.ma@intel.com<mailto:maurice.ma@intel.com>>; Dong,
> Guo <guo.dong@intel.com<mailto:guo.dong@intel.com>>
> Subject: [edk2] [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control
> if signaling PciEnumerationComplete.
>
>  PciEnumerationComplete might be signaled to FSP in Coreboot. So FSP
> wrapper driver don't need send it again. Add a PCD to control if a
> FSP API could be skipped from FspWrapperNotifyDxe driver.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Guo Dong <guo.dong@intel.com<mailto:guo.dong@intel.com>>
> Reviewed-by: Maurice Ma <maurice.ma@intel.com<mailto:maurice.ma@intel.com>>
> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com<mailto:jiewen.yao@intel.com>>
> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com<mailto:giri.p.mudusuru@intel.com>>
> ---
>  .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.c      | 22
> ++++++++++++++--------
>  .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf    |  1 +
>  IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec        | 18
> ++++++++++++++++++
>  3 files changed, 33 insertions(+), 8 deletions(-)
>
> diff --git
> a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> index 0797f44..d09e20e 100644
> --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> +++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> @@ -26,6 +26,8 @@
>  #include <Library/PerformanceLib.h>
>  #include <Library/HobLib.h>
>
> +#define   FSP_API_NOTIFY_PHASE_AFTER_PCI_ENUMERATION
> BIT16
> +
>  typedef
>  EFI_STATUS
>  (EFIAPI * ADD_PERFORMANCE_RECORDS)(
> @@ -237,6 +239,7 @@ FspWrapperNotifyDxeEntryPoint (
>    EFI_EVENT  ReadyToBootEvent;
>    VOID       *Registration;
>    EFI_EVENT  ProtocolNotifyEvent;
> +  UINT32     FspApiMask;
>
>    //
>    // Load this driver's image to memory @@ -246,14 +249,17 @@
> FspWrapperNotifyDxeEntryPoint (
>      return EFI_SUCCESS;
>    }
>
> -  ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent (
> -
> &gEfiPciEnumerationCompleteProtocolGuid,
> -                          TPL_CALLBACK,
> -                          OnPciEnumerationComplete,
> -                          NULL,
> -                          &Registration
> -                          );
> -  ASSERT (ProtocolNotifyEvent != NULL);
> +  FspApiMask = PcdGet32 (PcdSkipFspApi);  if ((FspApiMask &
> + FSP_API_NOTIFY_PHASE_AFTER_PCI_ENUMERATION)
> == 0) {
> +    ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent (
> +
> &gEfiPciEnumerationCompleteProtocolGuid,
> +                            TPL_CALLBACK,
> +                            OnPciEnumerationComplete,
> +                            NULL,
> +                            &Registration
> +                            );
> +    ASSERT (ProtocolNotifyEvent != NULL);  }
>
>    Status = EfiCreateEventReadyToBootEx (
>               TPL_CALLBACK,
> diff --git
> a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> index f851f68..54c2cbf 100644
> --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> +++
> b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> @@ -62,6 +62,7 @@
>
>  [Pcd]
>    gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress  ## CONSUMES
> +  gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi       ## CONSUMES
>
>  [Depex]
>    TRUE
> diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> index d9d2d80..ea3bc70 100644
> --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> @@ -75,6 +75,24 @@
>
> gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT3
> 2|0x00000300
>
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT
> 32|0x00000301
>
> +  ## This PCD indicates if FSP APIs are skipped from FSP
> + wrapper.<BR><BR>  #  If a bit is set, that means this FSP API is
> + skipped.<BR>  #  If a bit is clear, that means this FSP API is NOT
> + skipped.<BR>  #  NOTE: Only NotifyPhase Post PCI enumeration (BIT16)
> + is
> implemented.<BR>
> +  #  BIT[15:0] is for function:<BR>
> +  #    BIT0      Skip TempRamInit<BR>
> +  #    BIT1      Skip MemoryInit<BR>
> +  #    BIT2      Skip TempRamExit<BR>
> +  #    BIT3      Skip SiliconInit<BR>
> +  #    BIT4      Skip NotifyPhase<BR>
> +  #  BIT[32:16] is for sub-function:<BR>
> +  #    BIT16     Skip NotifyPhase (AfterPciEnumeration)<BR>
> +  #    BIT17     Skip NotifyPhase (ReadyToBoot)<BR>
> +  #    BIT18     Skip NotifyPhase (EndOfFirmware)<BR>
> +  #  Any undefined BITs are reserved for future use.<BR>  # @Prompt
> + Skip FSP API from FSP wrapper.
> +
> gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x4
> 0000009
> +
>  [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
>
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT
> 32|0x00001001
>
> \ No newline at end of file
> --
> 2.7.0.windows.1

      reply	other threads:[~2016-10-26  2:47 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-25 15:32 [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete gdong1
2016-10-25 23:31 ` Yao, Jiewen
2016-10-25 23:55   ` Dong, Guo
2016-10-26  2:47     ` Yao, Jiewen [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-list from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=74D8A39837DF1E4DA445A8C0B3885C50386B7600@shsmsx102.ccr.corp.intel.com \
    --to=devel@edk2.groups.io \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox