From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8BBDF81CEA for ; Fri, 4 Nov 2016 15:46:58 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP; 04 Nov 2016 15:47:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,445,1473145200"; d="scan'208,217";a="1064152382" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga001.fm.intel.com with ESMTP; 04 Nov 2016 15:47:01 -0700 Received: from fmsmsx115.amr.corp.intel.com (10.18.116.19) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 4 Nov 2016 15:46:59 -0700 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by fmsmsx115.amr.corp.intel.com (10.18.116.19) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 4 Nov 2016 15:46:59 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.206]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.209]) with mapi id 14.03.0248.002; Sat, 5 Nov 2016 06:46:57 +0800 From: "Yao, Jiewen" To: Laszlo Ersek , "edk2-devel@ml01.01.org" CC: "Kinney, Michael D" , "Tian, Feng" , "Fan, Jeff" , "Zeng, Star" Thread-Topic: [edk2] [PATCH V2 0/6] Enable SMM page level protection. Thread-Index: AQHSNn5Npc+l51c2NUCmigdj/tAIBqDI5aiAgACHkWA= Date: Fri, 4 Nov 2016 22:46:56 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C50386BEA9C@shsmsx102.ccr.corp.intel.com> References: <1478251854-14660-1-git-send-email-jiewen.yao@intel.com> In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.21 Subject: Re: [PATCH V2 0/6] Enable SMM page level protection. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 04 Nov 2016 22:46:59 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Ah, yes. Laszlo. You are right. I forget to push the last update yesterday. Thank you to remind me. Now it is synced. Thank you Yao Jiewen From: Laszlo Ersek [mailto:lersek@redhat.com] Sent: Saturday, November 5, 2016 6:40 AM To: Yao, Jiewen ; edk2-devel@ml01.01.org Cc: Kinney, Michael D ; Tian, Feng ; Fan, Jeff ; Zeng, Star Subject: Re: [edk2] [PATCH V2 0/6] Enable SMM page level protection. On 11/04/16 10:30, Jiewen Yao wrote: > =3D=3D=3D=3D below is V2 description =3D=3D=3D=3D > 1) PiSmmCpu: resolve OVMF multiple processors boot hang issue. > 2) PiSmmCpu: Add debug info on StartupAp() fails. > 3) PiSmmCpu: Add ASSERT for AllocatePages(). > 4) PiSmmCpu: Add protection detail in commit message. > 5) UefiCpuPkg.dsc: Add page table footprint info in commit message. Jiewen, can you please push this series to a new branch in your repo? I see a branch called "SmmProtection_V2", but it seems to end with an incomplete patch (26f482d8b611d0fcb07d3ffbf3f4468fd249767b, subject "pismmcpu"), so I figured I'd ask explicitly. Thanks Laszlo > =3D=3D=3D=3D below is V1 description =3D=3D=3D=3D > This series patch enables SMM page level protection. > Features are: > 1) PiSmmCore reports SMM PE image code/data information > in EdkiiPiSmmMemoryAttributeTable, if the SMM image is page aligned. > 2) PiSmmCpu consumes EdkiiPiSmmMemoryAttributeTable > and set XD for data page and RO for code page. > 3) PiSmmCpu enables Static Paging for X64 according to > PcdCpuSmmStaticPageTable. If it is true, 1G paging for above 4G > is used as long as it is supported. > 4) PiSmmCpu sets importance data structure to be read only, > such as Gdt, Idt, SmmEntrypoint, and PageTable itself. > > tested platform: > 1) Intel internal platform (X64). > 2) EDKII Quark IA32 > 3) EDKII Vlv2 X64 > 4) EDKII OVMF IA32 and IA32X64. (with -smp 8) > > Cc: Jeff Fan > > Cc: Feng Tian > > Cc: Star Zeng > > Cc: Michael D Kinney > > Cc: Laszlo Ersek > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Jiewen Yao > > > Jiewen Yao (6): > MdeModulePkg/Include: Add PiSmmMemoryAttributesTable.h > MdeModulePkg/dec: Add gEdkiiPiSmmMemoryAttributesTableGuid. > MdeModulePkg/PiSmmCore: Add MemoryAttributes support. > UefiCpuPkg/dec: Add PcdCpuSmmStaticPageTable. > UefiCpuPkg/PiSmmCpuDxeSmm: Add paging protection. > QuarkPlatformPkg/dsc: enable Smm paging protection. > > MdeModulePkg/Core/PiSmmCore/Dispatcher.c | 66 + > MdeModulePkg/Core/PiSmmCore/MemoryAttributesTable.c | 1509 ++++++++++= ++++++++++ > MdeModulePkg/Core/PiSmmCore/Page.c | 775 +++++++++- > MdeModulePkg/Core/PiSmmCore/PiSmmCore.c | 40 + > MdeModulePkg/Core/PiSmmCore/PiSmmCore.h | 91 ++ > MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf | 2 + > MdeModulePkg/Core/PiSmmCore/Pool.c | 16 + > MdeModulePkg/Include/Guid/PiSmmMemoryAttributesTable.h | 51 + > MdeModulePkg/MdeModulePkg.dec | 3 + > QuarkPlatformPkg/Quark.dsc | 6 + > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 71 +- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S | 67 +- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm | 68 +- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 70 +- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S | 226 +-- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm | 36 +- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm | 36 +- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c | 37 +- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c | 4 +- > UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 127 +- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 142 +- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 156 +- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 5 +- > UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 871 ++++++++++= + > UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 39 +- > UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.h | 15 +- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 274 +++- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S | 51 +- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm | 54 +- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 61 +- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S | 250 +--- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm | 35 +- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm | 31 +- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c | 30 +- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c | 7 +- > UefiCpuPkg/UefiCpuPkg.dec | 8 + > 36 files changed, 4529 insertions(+), 801 deletions(-) > create mode 100644 MdeModulePkg/Core/PiSmmCore/MemoryAttributesTable.c > create mode 100644 MdeModulePkg/Include/Guid/PiSmmMemoryAttributesTable.= h > create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c >