From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B0D78820D4 for ; Wed, 8 Feb 2017 10:33:54 -0800 (PST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP; 08 Feb 2017 10:33:54 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,348,1484035200"; d="scan'208,217";a="1104780576" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga001.fm.intel.com with ESMTP; 08 Feb 2017 10:33:54 -0800 Received: from fmsmsx118.amr.corp.intel.com (10.18.116.18) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 8 Feb 2017 10:33:53 -0800 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by fmsmsx118.amr.corp.intel.com (10.18.116.18) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 8 Feb 2017 10:33:52 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.88]) by SHSMSX104.ccr.corp.intel.com ([10.239.4.70]) with mapi id 14.03.0248.002; Thu, 9 Feb 2017 02:33:51 +0800 From: "Yao, Jiewen" To: "Duran, Leo" , "Gao, Liming" , "edk2-devel@ml01.01.org" CC: Laszlo Ersek , "Tian, Feng" , "Singh, Brijesh" , "Zeng, Star" Thread-Topic: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD PcdPteMemoryEncryptionAddressOrMask Thread-Index: AQHSgXv4au8E8mWrIUOyXbiZF/4SjKFetEYAgAAfiICAAIqIkP//i3kAgACGj1A= Date: Wed, 8 Feb 2017 18:33:49 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503A8EB261@shsmsx102.ccr.corp.intel.com> References: <1486497223-22694-1-git-send-email-leo.duran@amd.com> <1486497223-22694-2-git-send-email-leo.duran@amd.com> <4A89E2EF3DFEDB4C8BFDE51014F606A14D6D8590@shsmsx102.ccr.corp.intel.com> <74D8A39837DF1E4DA445A8C0B3885C503A8EB141@shsmsx102.ccr.corp.intel.com> In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.21 Subject: Re: [PATCH] MdeModulePkg: Add dynamic PCD PcdPteMemoryEncryptionAddressOrMask X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Feb 2017 18:33:54 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Comments below: From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Dura= n, Leo Sent: Wednesday, February 8, 2017 10:31 AM To: Yao, Jiewen ; Gao, Liming ;= edk2-devel@ml01.01.org Cc: Laszlo Ersek ; Tian, Feng ; Sin= gh, Brijesh ; Zeng, Star Subject: Re: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD PcdPteMemoryEncry= ptionAddressOrMask [Jiewen] The IA32 capsule code creates X64 page tables, then switch to X64. So the page table is for X64. Would you please double check if this PCD is = needed? Regarding: MedModelePkg/Universal/CapsulePei/UefiCapsule.c Create4GPageTables() explicitly sets PhysicalAddressBits =3D 32; So it seems like the address space is restricted to 4GB's even after switch= ing to LongMode. [Jiewen] We use page fault to handler above 4GiB access. :) However, to your point, SEV just requires LongMode... so I'll make the chan= ge. [Jiewen] Thank you. Leo. From: Yao, Jiewen [mailto:jiewen.yao@intel.com] Sent: Wednesday, February 08, 2017 11:30 AM To: Duran, Leo >; Gao, Liming <= liming.gao@intel.com>; edk2-devel@ml01.01.org<= mailto:edk2-devel@ml01.01.org> Cc: Singh, Brijesh >; T= ian, Feng >; Laszlo Ersek <= lersek@redhat.com>; Zeng, Star >; Yao, Jiewen > Subject: RE: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD PcdPteMemoryEncry= ptionAddressOrMask Comments below: From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Dura= n, Leo Sent: Wednesday, February 8, 2017 9:12 AM To: Gao, Liming >>; edk2-devel@ml01.01.org= > Cc: Singh, Brijesh >>; Tian, Feng >>; Laszlo Ersek >>; Zeng, St= ar >> Subject: Re: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD PcdPteMemoryEncry= ptionAddressOrMask Please see replies below. Thanks, Leo > -----Original Message----- > From: Gao, Liming [mailto:liming.gao@intel.com] > Sent: Wednesday, February 08, 2017 9:19 AM > To: Duran, Leo >>; edk2-devel@ml01.01.org> > Cc: Laszlo Ersek >>; Tian, Feng >>; > Singh, Brijesh >>; Zeng, Star >> > Subject: RE: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD > PcdPteMemoryEncryptionAddressOrMask > > Leo: > MdeModulePkg CapsulePei and UefiCpuPkg S3Resume2 also create > PageTable to run X64 code. Do they require this change? > > Thanks > Liming [Duran, Leo] 1) MedModelePkg/Universal/CapsulePei: Does not seem applicable for MDE_XPU_X64 compile-time option, which is requ= ired for SEV. - ModeSwitch() calls Thunk32To64(), which in turn may call Create4GPageTabl= es() - However, ModeSwitch() is called only under #ifdef MDE_CPU_IA32 [Jiewen] The IA32 capsule code creates X64 page tables, then switch to X64. So the page table is for X64. Would you please double check if this PCD is = needed? 2) UefiCpuPkg/Universal/Acpi/S3Resume2Pei: Agreed. Will incorporate changes in 'v2' of the patch. > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Leo Duran > Sent: Wednesday, February 8, 2017 3:54 AM > To: edk2-devel@ml01.01.org> > Cc: Laszlo Ersek >>; Tian, Feng >>; > Brijesh Singh >>; Zeng, Star >>; > Leo Duran >> > Subject: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD > PcdPteMemoryEncryptionAddressOrMask > > From: Brijesh Singh >> > > This dynamic PCD holds the address mask for page table entries when > memory encryption is enabled on AMD processors supporting the Secure > Encrypted Virtualization (SEV) feature. > > Cc: Feng Tian >> > Cc: Star Zeng >> > Cc: Laszlo Ersek >> > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Leo Duran >> > --- > MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 5 ++++- > MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 18 ++++++++++-- > ------ > MdeModulePkg/MdeModulePkg.dec | 8 ++++++++ > 3 files changed, 22 insertions(+), 9 deletions(-) > > diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > index 2bc41be..d62bd9b 100644 > --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > @@ -6,6 +6,8 @@ > # needed to run the DXE Foundation. > # > # Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved. > +# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# > # This program and the accompanying materials # are licensed and made > available under the terms and conditions of the BSD License # which > accompanies this distribution. The full text of the license may be found= at > @@ -111,7 +113,8 @@ [FeaturePcd] > gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress ## > CONSUMES > > [Pcd.IA32,Pcd.X64] > - gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable ## > SOMETIMES_CONSUMES > + gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable = ## > SOMETIMES_CONSUMES > + > gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrM > ask ## CONSUMES > > [Pcd.IA32,Pcd.X64,Pcd.ARM,Pcd.AARCH64] > gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack ## > SOMETIMES_CONSUMES > diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c > b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c > index 790f6ab..2c52389 100644 > --- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c > +++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c > @@ -16,6 +16,8 @@ > 3) IA-32 Intel(R) Architecture Software Developer's Manual Volume > 3:System Programmer's Guide, Intel > > Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
> +Copyright (c) 2017, AMD Incorporated. All rights reserved.
> + > This program and the accompanying materials are licensed and made > available under the terms and conditions of the BSD License which > accompanies this distribution. The full text of the license may be found= at > @@ -71,14 +73,14 @@ Split2MPageTo4K ( > // > // Fill in 2M page entry. > // > - *PageEntry2M =3D (UINT64) (UINTN) PageTableEntry | IA32_PG_P | > IA32_PG_RW; > + *PageEntry2M =3D (UINT64) (UINTN) PageTableEntry | PcdGet64 > + (PcdPteMemoryEncryptionAddressOrMask) | IA32_PG_P | IA32_PG_RW; > > PhysicalAddress4K =3D PhysicalAddress; > for (IndexOfPageTableEntries =3D 0; IndexOfPageTableEntries < 512; > IndexOfPageTableEntries++, PageTableEntry++, PhysicalAddress4K +=3D > SIZE_4KB) { > // > // Fill in the Page Table entries > // > - PageTableEntry->Uint64 =3D (UINT64) PhysicalAddress4K; > + PageTableEntry->Uint64 =3D (UINT64) PhysicalAddress4K | PcdGet64 > + (PcdPteMemoryEncryptionAddressOrMask); > PageTableEntry->Bits.ReadWrite =3D 1; > PageTableEntry->Bits.Present =3D 1; > if ((PhysicalAddress4K >=3D StackBase) && (PhysicalAddress4K < Stack= Base + > StackSize)) { @@ -116,7 +118,7 @@ Split1GPageTo2M ( > // > // Fill in 1G page entry. > // > - *PageEntry1G =3D (UINT64) (UINTN) PageDirectoryEntry | IA32_PG_P | > IA32_PG_RW; > + *PageEntry1G =3D (UINT64) (UINTN) PageDirectoryEntry | PcdGet64 > + (PcdPteMemoryEncryptionAddressOrMask) | IA32_PG_P | IA32_PG_RW; > > PhysicalAddress2M =3D PhysicalAddress; > for (IndexOfPageDirectoryEntries =3D 0; IndexOfPageDirectoryEntries < = 512; > IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress2M > +=3D SIZE_2MB) { @@ -129,7 +131,7 @@ Split1GPageTo2M ( > // > // Fill in the Page Directory entries > // > - PageDirectoryEntry->Uint64 =3D (UINT64) PhysicalAddress2M; > + PageDirectoryEntry->Uint64 =3D (UINT64) PhysicalAddress2M | > + PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); > PageDirectoryEntry->Bits.ReadWrite =3D 1; > PageDirectoryEntry->Bits.Present =3D 1; > PageDirectoryEntry->Bits.MustBe1 =3D 1; @@ -248,7 +250,7 @@ > CreateIdentityMappingPageTables ( > // > // Make a PML4 Entry > // > - PageMapLevel4Entry->Uint64 =3D > (UINT64)(UINTN)PageDirectoryPointerEntry; > + PageMapLevel4Entry->Uint64 =3D > + (UINT64)(UINTN)PageDirectoryPointerEntry | PcdGet64 > + (PcdPteMemoryEncryptionAddressOrMask); > PageMapLevel4Entry->Bits.ReadWrite =3D 1; > PageMapLevel4Entry->Bits.Present =3D 1; > > @@ -262,7 +264,7 @@ CreateIdentityMappingPageTables ( > // > // Fill in the Page Directory entries > // > - PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress; > + PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress | PcdGet6= 4 > + (PcdPteMemoryEncryptionAddressOrMask); > PageDirectory1GEntry->Bits.ReadWrite =3D 1; > PageDirectory1GEntry->Bits.Present =3D 1; > PageDirectory1GEntry->Bits.MustBe1 =3D 1; @@ -280,7 +282,7 @@ > CreateIdentityMappingPageTables ( > // > // Fill in a Page Directory Pointer Entries > // > - PageDirectoryPointerEntry->Uint64 =3D > (UINT64)(UINTN)PageDirectoryEntry; > + PageDirectoryPointerEntry->Uint64 =3D > + (UINT64)(UINTN)PageDirectoryEntry | PcdGet64 > + (PcdPteMemoryEncryptionAddressOrMask); > PageDirectoryPointerEntry->Bits.ReadWrite =3D 1; > PageDirectoryPointerEntry->Bits.Present =3D 1; > > @@ -294,7 +296,7 @@ CreateIdentityMappingPageTables ( > // > // Fill in the Page Directory entries > // > - PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress; > + PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress | PcdGet6= 4 > + (PcdPteMemoryEncryptionAddressOrMask); > PageDirectoryEntry->Bits.ReadWrite =3D 1; > PageDirectoryEntry->Bits.Present =3D 1; > PageDirectoryEntry->Bits.MustBe1 =3D 1; diff --git > a/MdeModulePkg/MdeModulePkg.dec > b/MdeModulePkg/MdeModulePkg.dec index 273cd7e..207384f 100644 > --- a/MdeModulePkg/MdeModulePkg.dec > +++ b/MdeModulePkg/MdeModulePkg.dec > @@ -6,6 +6,8 @@ > # Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.
= # > Copyright (c) 2016, Linaro Ltd. All rights reserved.
# (C) Copyright= 2016 > Hewlett Packard Enterprise Development LP
> +# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# > # This program and the accompanying materials are licensed and made > available under # the terms and conditions of the BSD License that > accompanies this distribution. > # The full text of the license may be found at @@ -1738,5 +1740,11 @@ > [PcdsDynamic, PcdsDynamicEx] > # @Prompt If there is any test key used by the platform. > > gEfiMdeModulePkgTokenSpaceGuid.PcdTestKeyUsed|FALSE|BOOLEAN|0x0 > 0030003 > > + ## This dynamic PCD holds the address mask for page table entries > + when memory encryption is # enabled on AMD processors supporting the > Secure Encrypted Virtualization (SEV) feature. > + # This mask should be applied when creating 1:1 virtual to physical > mapping tables. > + # > + > + > gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrM > ask|0x0 > + |UINT64|0x00030004 > + > [UserExtensions.TianoCore."ExtraFiles"] > MdeModulePkgExtra.uni > -- > 1.9.1 > > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org> > https://lists.01.org/mailman/listinfo/edk2-devel _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org> https://lists.01.org/mailman/listinfo/edk2-devel _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel