From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D83EA21A04830 for ; Tue, 2 May 2017 06:00:16 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga104.jf.intel.com with ESMTP; 02 May 2017 06:00:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,405,1488873600"; d="scan'208,217";a="81475321" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by orsmga002.jf.intel.com with ESMTP; 02 May 2017 05:59:54 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 2 May 2017 05:59:53 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.246]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.117]) with mapi id 14.03.0319.002; Tue, 2 May 2017 20:59:51 +0800 From: "Yao, Jiewen" To: Ard Biesheuvel CC: "Ni, Ruiyu" , "edk2-devel@lists.01.org" , Leo Duran Thread-Topic: [edk2] [RFC] [PATCH V4 0/3] Add IOMMU support. Thread-Index: AQHSwyzk0WUkJNWvZkWOe2+L0SDLOaHhAIkQ Date: Tue, 2 May 2017 12:59:50 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503A936839@shsmsx102.ccr.corp.intel.com> References: <1493473694-5064-1-git-send-email-jiewen.yao@intel.com> In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.22 Subject: Re: [RFC] [PATCH V4 0/3] Add IOMMU support. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 May 2017 13:00:17 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable That is awesome! I am glad to see a real example - GenericSmmuStaticPciDmaDxe Let's continue the discussion on if we can make it simpler. Thank you Yao Jiewen From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Ard = Biesheuvel Sent: Tuesday, May 2, 2017 6:15 PM To: Yao, Jiewen Cc: Ni, Ruiyu ; edk2-devel@lists.01.org; Leo Duran Subject: Re: [edk2] [RFC] [PATCH V4 0/3] Add IOMMU support. On 29 April 2017 at 14:48, Jiewen Yao > wrote: > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D V4 =3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D > Refine the EDKII_IOMMU_PROTOCOL. > > 1) Add AllocateBuffer/FreeBuffer/Map/Unmap() API. > They are similar to DmaLib in EmbeddedPkg and > similar to the previous BmDmaLib (by leo.duran@amd.com). > > These APIs are invoked by PciHostBridge driver > to allocate DMA memory. > > The PciHostBridge driver (IOMMU consumer) is simplified: > It uses IOMMU, if IOMMU protocol is present. > Else it uses original logic. > > 2) Add SetMappingAttribute() API. > It is similar to SetAttribute() API in V1. > > This API is invoked by PciBus driver to set DMA > access attribute (read/write) for device. > > The PciBus driver (IOMMU consumer) is simplified: > It sets access attribute in Map/Unmap, > if IOMMU protocol is present. > > 3) Remove SetRemapAddress/GetRemapAddress() API. > Because PciHostBridge/PciBus can call the APIs defined > above, there is no need to provide remap capability. > > -- Sample producer drivers: > 1) The sample VTd driver (IOMMU producer) > is at https://github.com/jyao1/edk2/tree/dma_v4/IntelSiliconPkg/IntelVTdD= xe > > It is added to show the concept. It is not fully implemented yet. > It will not be checked in in this patch. > > 2) The sample AMD SEV driver (IOMMU producer) > is at https://github.com/jyao1/edk2/tree/dma_v4/IntelSiliconPkg/SampleAmd= SevDxe > (code is borrowed from leo.duran@amd.com and br= ijesh.singh@amd.com) > > This is not a right place to put this driver. > > It is added to show the concept. > It is not fully implemented. It will not be checked in. > Please do not use it directly. > > 3) The sample STYX driver (IOMMU producer) > is at https://github.com/jyao1/edk2/tree/dma_v4/IntelSiliconPkg/SampleSty= xDxe > (code is borrowed from ard.biesheuvel@linaro.org) > > This is not a right place to put this driver. > > It is added to show the concept. > It is not fully implemented. It will not be checked in. > Please do not use it directly. > With the issue in 3/3 addressed: Tested-by: Ard Biesheuvel > on AMD Seattle, with a static remapping driver that I will send out shortly= . I am quite happy with this version, but I would like to continue the discussion as to whether we really need SetAttribute() and SetMappingAttribute() -- Ard. > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D V3 =3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D > 1) Add Remap capability (from Ard Biesheuvel) > Add EDKII_IOMMU_REMAP_ADDRESS API in IOMMU_PROTOCOL. > > NOTE: The code is not fully validated yet. > The purpose is to collect feedback to decide the next step. > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D V2 =3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D > 1) Enhance Unmap() in PciIo (From Ruiyu Ni) > Maintain a local list of MapInfo and match it in Unmap. > > 2) CopyMem for ReadOperation in PciIo after SetAttribute (Leo Duran) > Fix a bug in V1 that copy mem for read happen before SetAttribute, > which will break AMD SEV solution. > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D V1 =3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D > > This patch series adds IOMMU protocol and updates the consumer > to support IOMMU based DMA access in UEFI. > > This patch series can support the BmDmaLib request for AMD SEV. > submitted by Duran, Leo > and= Brijesh Singh >. > https://lists.01.org/pipermail/edk2-devel/2017-March/008109.html, and > https://lists.01.org/pipermail/edk2-devel/2017-March/008820.html. > We can have an AMD SEV specific IOMMU driver to produce IOMMU protocol, > and clear SEV in IOMMU->SetAttribute(). > > This patch series can also support Intel VTd based DMA protection, > requested by Jiewen Yao >, discussed in > https://lists.01.org/pipermail/edk2-devel/2017-March/008157.html. > We can have an Intel VTd specific IOMMU driver to produce IOMMU protocol, > and update VTd engine to grant or deny access in IOMMU->SetAttribute(). > > This patch series does not provide a full Intel VTd driver, which > will be provide in other patch in the future. > > The purpose of this patch series to review if this IOMMU protocol design > can meet all DMA access and management requirement. > > Cc: Ruiyu Ni > > Cc: Leo Duran > > Cc: Brijesh Singh > > Cc: Ard Biesheuvel > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Jiewen Yao > > > Jiewen Yao (3): > MdeModulePkg/Include: Add IOMMU protocol definition. > MdeModulePkg/PciHostBridge: Add IOMMU support. > MdeModulePkg/PciBus: Add IOMMU support. > > MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 9 + > MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 1 + > MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 1 + > MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 37 +++ > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 37 +++ > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf | 2 + > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h | 2 + > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 61 ++++ > MdeModulePkg/Include/Protocol/IoMmu.h | 310 +++++++= +++++++++++++ > MdeModulePkg/MdeModulePkg.dec | 3 + > 10 files changed, 463 insertions(+) > create mode 100644 MdeModulePkg/Include/Protocol/IoMmu.h > > -- > 2.7.4.windows.1 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel