From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3007821A00ACE for ; Fri, 23 Jun 2017 02:51:46 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga105.jf.intel.com with ESMTP; 23 Jun 2017 02:53:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.39,377,1493708400"; d="scan'208";a="102827924" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga002.jf.intel.com with ESMTP; 23 Jun 2017 02:53:11 -0700 Received: from fmsmsx101.amr.corp.intel.com (10.18.124.199) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 23 Jun 2017 02:53:11 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by fmsmsx101.amr.corp.intel.com (10.18.124.199) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 23 Jun 2017 02:53:11 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.146]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.116]) with mapi id 14.03.0319.002; Fri, 23 Jun 2017 17:53:09 +0800 From: "Yao, Jiewen" To: "Wu, Hao A" , "edk2-devel@lists.01.org" Thread-Topic: [PATCH] IntelSiliconPkg: Add package DSC file Thread-Index: AQHS6wMaBm2/ssCI50aWFKUcc2X4/qIyNvQQ Date: Fri, 23 Jun 2017 09:53:08 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503A96E649@shsmsx102.ccr.corp.intel.com> References: <20170622025604.12228-1-hao.a.wu@intel.com> In-Reply-To: <20170622025604.12228-1-hao.a.wu@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] IntelSiliconPkg: Add package DSC file X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Jun 2017 09:51:46 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Jiewen.yao@intel.com > -----Original Message----- > From: Wu, Hao A > Sent: Thursday, June 22, 2017 10:56 AM > To: edk2-devel@lists.01.org > Cc: Wu, Hao A ; Yao, Jiewen > Subject: [PATCH] IntelSiliconPkg: Add package DSC file >=20 > Cc: Jiewen Yao > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Hao Wu > --- > IntelSiliconPkg/IntelSiliconPkg.dsc | 46 > +++++++++++++++++++++++++++++++++++++ > 1 file changed, 46 insertions(+) > create mode 100644 IntelSiliconPkg/IntelSiliconPkg.dsc >=20 > diff --git a/IntelSiliconPkg/IntelSiliconPkg.dsc > b/IntelSiliconPkg/IntelSiliconPkg.dsc > new file mode 100644 > index 0000000000..f77f2a966e > --- /dev/null > +++ b/IntelSiliconPkg/IntelSiliconPkg.dsc > @@ -0,0 +1,46 @@ > +## @file > +# This package provides common open source Intel silicon modules. > +# > +# Copyright (c) 2017, Intel Corporation. All rights reserved.
> +# > +# This program and the accompanying materials > +# are licensed and made available under the terms and conditions of t= he > BSD License > +# which accompanies this distribution. The full text of the license m= ay be > found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +# > +## > + > +[Defines] > + PLATFORM_NAME =3D IntelSiliconPkg > + PLATFORM_GUID =3D > 9B96228E-1155-4967-8E16-D0ED8E1B4297 > + PLATFORM_VERSION =3D 0.1 > + DSC_SPECIFICATION =3D 0x00010005 > + OUTPUT_DIRECTORY =3D Build/IntelSiliconPkg > + SUPPORTED_ARCHITECTURES =3D IA32|X64 > + BUILD_TARGETS =3D DEBUG|RELEASE|NOOPT > + SKUID_IDENTIFIER =3D DEFAULT > + > +############################################################ > ####################################### > +# > +# Components Section - list of the modules and components that will be > processed by compilation > +# tools and the EDK II tools to generate > PE32/PE32+/Coff image files. > +# > +# Note: The EDK II DSC file is not used to specify how compiled binary i= mages > get placed > +# into firmware volume images. This section is just a list of modu= les to > compile from > +# source into UEFI-compliant binaries. > +# It is the FDF file that contains information on combining binary= files > into firmware > +# volume images, whose concept is beyond UEFI and is described in = PI > specification. > +# Binary modules do not need to be listed in this section, as they= should > be > +# specified in the FDF file. For example: Shell binary (Shell_Full= .efi), FAT > binary (Fat.efi), > +# Logo (Logo.bmp), and etc. > +# There may also be modules listed in this section that are not re= quired > in the FDF file, > +# When a module listed here is excluded from FDF file, then > UEFI-compliant binary will be > +# generated for it, but the binary will not be put into any firmwa= re > volume. > +# > +############################################################ > ####################################### > + > +[Components] > + IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.inf > -- > 2.12.0.windows.1