From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8C09321E2572D for ; Wed, 16 Aug 2017 18:06:45 -0700 (PDT) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP; 16 Aug 2017 18:09:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,385,1498546800"; d="scan'208";a="119858981" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga004.jf.intel.com with ESMTP; 16 Aug 2017 18:09:11 -0700 Received: from fmsmsx118.amr.corp.intel.com (10.18.116.18) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 16 Aug 2017 18:09:11 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by fmsmsx118.amr.corp.intel.com (10.18.116.18) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 16 Aug 2017 18:09:11 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.183]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.128]) with mapi id 14.03.0319.002; Thu, 17 Aug 2017 09:09:09 +0800 From: "Yao, Jiewen" To: "Bi, Dandan" , "edk2-devel@lists.01.org" Thread-Topic: [patch] IntelSiliconPkg/IntelVTdDxe: Update function comments Thread-Index: AQHTFvVNE1dJpcuyW0yDd5iuuqlCtaKHvOSQ Date: Thu, 17 Aug 2017 01:09:08 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503A9924BD@shsmsx102.ccr.corp.intel.com> References: <1502932064-279976-1-git-send-email-dandan.bi@intel.com> In-Reply-To: <1502932064-279976-1-git-send-email-dandan.bi@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [patch] IntelSiliconPkg/IntelVTdDxe: Update function comments X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Aug 2017 01:06:45 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Jiewen.yao@intel.com > -----Original Message----- > From: Bi, Dandan > Sent: Thursday, August 17, 2017 9:08 AM > To: edk2-devel@lists.01.org > Cc: Yao, Jiewen > Subject: [patch] IntelSiliconPkg/IntelVTdDxe: Update function comments >=20 > In commit 4ad5f597153c7cb20a968236c2c7d6ff01994350, the parameters > of some functions have been updated, but miss to update the comments > accordingly. This patch is to update the function comments. >=20 > Cc: Jiewen Yao > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Dandan Bi > --- > IntelSiliconPkg/IntelVTdDxe/DmaProtection.h | 1 + > IntelSiliconPkg/IntelVTdDxe/TranslationTable.c | 2 ++ > 2 files changed, 3 insertions(+) >=20 > diff --git a/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h > b/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h > index c3b57a0..c311b29 100644 > --- a/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h > +++ b/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h > @@ -314,10 +314,11 @@ DumpSecondLevelPagingEntry ( >=20 > /** > Set VTd attribute for a system memory. >=20 > @param[in] VtdIndex The index used to identify a VTd > engine. > + @param[in] DomainIdentifier The domain ID of the source. > @param[in] SecondLevelPagingEntry The second level paging entry in V= Td > table for the device. > @param[in] BaseAddress The base of device memory > address to be used as the DMA memory. > @param[in] Length The length of device memory > address to be used as the DMA memory. > @param[in] IoMmuAccess The IOMMU access. >=20 > diff --git a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c > b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c > index 80fc823..bc0c24c 100644 > --- a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c > +++ b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c > @@ -732,10 +732,11 @@ SplitSecondLevelPage ( >=20 > /** > Set VTd attribute for a system memory on second level page entry >=20 > @param[in] VtdIndex The index used to identify a VTd > engine. > + @param[in] DomainIdentifier The domain ID of the source. > @param[in] SecondLevelPagingEntry The second level paging entry in V= Td > table for the device. > @param[in] BaseAddress The base of device memory > address to be used as the DMA memory. > @param[in] Length The length of device memory > address to be used as the DMA memory. > @param[in] IoMmuAccess The IOMMU access. >=20 > @@ -815,10 +816,11 @@ SetSecondLevelPagingAttribute ( >=20 > /** > Set VTd attribute for a system memory. >=20 > @param[in] VtdIndex The index used to identify a VTd > engine. > + @param[in] DomainIdentifier The domain ID of the source. > @param[in] SecondLevelPagingEntry The second level paging entry in V= Td > table for the device. > @param[in] BaseAddress The base of device memory > address to be used as the DMA memory. > @param[in] Length The length of device memory > address to be used as the DMA memory. > @param[in] IoMmuAccess The IOMMU access. >=20 > -- > 1.9.5.msysgit.1