From: "Yao, Jiewen" <jiewen.yao@intel.com>
To: "Zeng, Star" <star.zeng@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: Laszlo Ersek <lersek@redhat.com>, "Dong, Eric" <eric.dong@intel.com>
Subject: Re: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Centralize mPhysicalAddressBits definition
Date: Mon, 28 Aug 2017 08:19:28 +0000 [thread overview]
Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503A9A0C36@shsmsx102.ccr.corp.intel.com> (raw)
In-Reply-To: <1503885256-174936-1-git-send-email-star.zeng@intel.com>
Reviewed-by: Jiewen.yao@intel.com
> -----Original Message-----
> From: Zeng, Star
> Sent: Monday, August 28, 2017 9:54 AM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star <star.zeng@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>;
> Laszlo Ersek <lersek@redhat.com>; Dong, Eric <eric.dong@intel.com>
> Subject: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Centralize
> mPhysicalAddressBits definition
>
> Originally (before 714c2603018a99a514c42c2b511c821f30ba9cdf),
> mPhysicalAddressBits was only defined in X64 PageTbl.c, after
> 714c2603018a99a514c42c2b511c821f30ba9cdf, mPhysicalAddressBits is
> also defined in Ia32 PageTbl.c, then mPhysicalAddressBits is used in
> ConvertMemoryPageAttributes() for address check.
>
> This patch is to centralize mPhysicalAddressBits definition to
> PiSmmCpuDxeSmm.c from Ia32 and X64 PageTbl.c.
>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Suggested-by: Laszlo Ersek <lersek@redhat.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Star Zeng <star.zeng@intel.com>
> ---
> UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 2 --
> UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 2 ++
> UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 1 -
> 3 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> index e88b42d73343..f295c2ebf228 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> @@ -16,8 +16,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND,
> EITHER EXPRESS OR IMPLIED.
>
> #include "PiSmmCpuDxeSmm.h"
>
> -UINT8 mPhysicalAddressBits;
> -
> /**
> Create PageTable for SMM use.
>
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> index 8e7964271125..282d2e69817c 100755
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> @@ -114,6 +114,8 @@ SPIN_LOCK
> *mConfigSmmCodeAccessCheckLock = NULL;
> EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
> UINTN mSmmCpuSmramRangeCount;
>
> +UINT8 mPhysicalAddressBits;
> +
> /**
> Initialize IDT to setup exception handlers for SMM.
>
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> index 32385faae470..3dde80f9bad6 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> @@ -21,7 +21,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND,
> EITHER EXPRESS OR IMPLIED.
>
> LIST_ENTRY mPagePool =
> INITIALIZE_LIST_HEAD_VARIABLE (mPagePool);
> BOOLEAN m1GPageTableSupport = FALSE;
> -UINT8 mPhysicalAddressBits;
> BOOLEAN mCpuSmmStaticPageTable;
>
> /**
> --
> 2.7.0.windows.1
prev parent reply other threads:[~2017-08-28 8:16 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-28 1:54 [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Centralize mPhysicalAddressBits definition Star Zeng
2017-08-28 7:15 ` Laszlo Ersek
2017-08-28 8:19 ` Yao, Jiewen [this message]
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