* [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Centralize mPhysicalAddressBits definition
@ 2017-08-28 1:54 Star Zeng
2017-08-28 7:15 ` Laszlo Ersek
2017-08-28 8:19 ` Yao, Jiewen
0 siblings, 2 replies; 3+ messages in thread
From: Star Zeng @ 2017-08-28 1:54 UTC (permalink / raw)
To: edk2-devel; +Cc: Star Zeng, Jiewen Yao, Laszlo Ersek, Eric Dong
Originally (before 714c2603018a99a514c42c2b511c821f30ba9cdf),
mPhysicalAddressBits was only defined in X64 PageTbl.c, after
714c2603018a99a514c42c2b511c821f30ba9cdf, mPhysicalAddressBits is
also defined in Ia32 PageTbl.c, then mPhysicalAddressBits is used in
ConvertMemoryPageAttributes() for address check.
This patch is to centralize mPhysicalAddressBits definition to
PiSmmCpuDxeSmm.c from Ia32 and X64 PageTbl.c.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Eric Dong <eric.dong@intel.com>
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
---
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 2 --
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 2 ++
UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 1 -
3 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
index e88b42d73343..f295c2ebf228 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
@@ -16,8 +16,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include "PiSmmCpuDxeSmm.h"
-UINT8 mPhysicalAddressBits;
-
/**
Create PageTable for SMM use.
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
index 8e7964271125..282d2e69817c 100755
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -114,6 +114,8 @@ SPIN_LOCK *mConfigSmmCodeAccessCheckLock = NULL;
EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
UINTN mSmmCpuSmramRangeCount;
+UINT8 mPhysicalAddressBits;
+
/**
Initialize IDT to setup exception handlers for SMM.
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 32385faae470..3dde80f9bad6 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -21,7 +21,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
LIST_ENTRY mPagePool = INITIALIZE_LIST_HEAD_VARIABLE (mPagePool);
BOOLEAN m1GPageTableSupport = FALSE;
-UINT8 mPhysicalAddressBits;
BOOLEAN mCpuSmmStaticPageTable;
/**
--
2.7.0.windows.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Centralize mPhysicalAddressBits definition
2017-08-28 1:54 [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Centralize mPhysicalAddressBits definition Star Zeng
@ 2017-08-28 7:15 ` Laszlo Ersek
2017-08-28 8:19 ` Yao, Jiewen
1 sibling, 0 replies; 3+ messages in thread
From: Laszlo Ersek @ 2017-08-28 7:15 UTC (permalink / raw)
To: Star Zeng, edk2-devel; +Cc: Jiewen Yao, Eric Dong
On 08/28/17 03:54, Star Zeng wrote:
> Originally (before 714c2603018a99a514c42c2b511c821f30ba9cdf),
> mPhysicalAddressBits was only defined in X64 PageTbl.c, after
> 714c2603018a99a514c42c2b511c821f30ba9cdf, mPhysicalAddressBits is
> also defined in Ia32 PageTbl.c, then mPhysicalAddressBits is used in
> ConvertMemoryPageAttributes() for address check.
>
> This patch is to centralize mPhysicalAddressBits definition to
> PiSmmCpuDxeSmm.c from Ia32 and X64 PageTbl.c.
>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Suggested-by: Laszlo Ersek <lersek@redhat.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Star Zeng <star.zeng@intel.com>
> ---
> UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 2 --
> UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 2 ++
> UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 1 -
> 3 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> index e88b42d73343..f295c2ebf228 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> @@ -16,8 +16,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>
> #include "PiSmmCpuDxeSmm.h"
>
> -UINT8 mPhysicalAddressBits;
> -
> /**
> Create PageTable for SMM use.
>
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> index 8e7964271125..282d2e69817c 100755
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> @@ -114,6 +114,8 @@ SPIN_LOCK *mConfigSmmCodeAccessCheckLock = NULL;
> EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
> UINTN mSmmCpuSmramRangeCount;
>
> +UINT8 mPhysicalAddressBits;
> +
> /**
> Initialize IDT to setup exception handlers for SMM.
>
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> index 32385faae470..3dde80f9bad6 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> @@ -21,7 +21,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>
> LIST_ENTRY mPagePool = INITIALIZE_LIST_HEAD_VARIABLE (mPagePool);
> BOOLEAN m1GPageTableSupport = FALSE;
> -UINT8 mPhysicalAddressBits;
> BOOLEAN mCpuSmmStaticPageTable;
>
> /**
>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Thanks!
Laszlo
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Centralize mPhysicalAddressBits definition
2017-08-28 1:54 [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Centralize mPhysicalAddressBits definition Star Zeng
2017-08-28 7:15 ` Laszlo Ersek
@ 2017-08-28 8:19 ` Yao, Jiewen
1 sibling, 0 replies; 3+ messages in thread
From: Yao, Jiewen @ 2017-08-28 8:19 UTC (permalink / raw)
To: Zeng, Star, edk2-devel@lists.01.org; +Cc: Laszlo Ersek, Dong, Eric
Reviewed-by: Jiewen.yao@intel.com
> -----Original Message-----
> From: Zeng, Star
> Sent: Monday, August 28, 2017 9:54 AM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star <star.zeng@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>;
> Laszlo Ersek <lersek@redhat.com>; Dong, Eric <eric.dong@intel.com>
> Subject: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Centralize
> mPhysicalAddressBits definition
>
> Originally (before 714c2603018a99a514c42c2b511c821f30ba9cdf),
> mPhysicalAddressBits was only defined in X64 PageTbl.c, after
> 714c2603018a99a514c42c2b511c821f30ba9cdf, mPhysicalAddressBits is
> also defined in Ia32 PageTbl.c, then mPhysicalAddressBits is used in
> ConvertMemoryPageAttributes() for address check.
>
> This patch is to centralize mPhysicalAddressBits definition to
> PiSmmCpuDxeSmm.c from Ia32 and X64 PageTbl.c.
>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Suggested-by: Laszlo Ersek <lersek@redhat.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Star Zeng <star.zeng@intel.com>
> ---
> UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 2 --
> UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 2 ++
> UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 1 -
> 3 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> index e88b42d73343..f295c2ebf228 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
> @@ -16,8 +16,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND,
> EITHER EXPRESS OR IMPLIED.
>
> #include "PiSmmCpuDxeSmm.h"
>
> -UINT8 mPhysicalAddressBits;
> -
> /**
> Create PageTable for SMM use.
>
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> index 8e7964271125..282d2e69817c 100755
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> @@ -114,6 +114,8 @@ SPIN_LOCK
> *mConfigSmmCodeAccessCheckLock = NULL;
> EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
> UINTN mSmmCpuSmramRangeCount;
>
> +UINT8 mPhysicalAddressBits;
> +
> /**
> Initialize IDT to setup exception handlers for SMM.
>
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> index 32385faae470..3dde80f9bad6 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> @@ -21,7 +21,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND,
> EITHER EXPRESS OR IMPLIED.
>
> LIST_ENTRY mPagePool =
> INITIALIZE_LIST_HEAD_VARIABLE (mPagePool);
> BOOLEAN m1GPageTableSupport = FALSE;
> -UINT8 mPhysicalAddressBits;
> BOOLEAN mCpuSmmStaticPageTable;
>
> /**
> --
> 2.7.0.windows.1
^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-08-28 1:54 [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Centralize mPhysicalAddressBits definition Star Zeng
2017-08-28 7:15 ` Laszlo Ersek
2017-08-28 8:19 ` Yao, Jiewen
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