From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E5C6B21E94617 for ; Tue, 19 Sep 2017 23:30:48 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Sep 2017 23:33:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,420,1500966000"; d="scan'208";a="137385859" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by orsmga002.jf.intel.com with ESMTP; 19 Sep 2017 23:33:53 -0700 Received: from fmsmsx156.amr.corp.intel.com (10.18.116.74) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 19 Sep 2017 23:33:52 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by fmsmsx156.amr.corp.intel.com (10.18.116.74) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 19 Sep 2017 23:33:51 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.175]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.213]) with mapi id 14.03.0319.002; Wed, 20 Sep 2017 14:33:50 +0800 From: "Yao, Jiewen" To: "Zeng, Star" , "edk2-devel@lists.01.org" Thread-Topic: [PATCH 1/3] IntelSiliconPkg/VTdInfoPpi: Let it follow DMAR table. Thread-Index: AQHTMdnsnqxcw9hZ1USFzGA9LY43FaK9URkA Date: Wed, 20 Sep 2017 06:33:48 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503A9BF4C7@shsmsx102.ccr.corp.intel.com> References: <1505628407-7368-1-git-send-email-jiewen.yao@intel.com> <1505628407-7368-2-git-send-email-jiewen.yao@intel.com> <0C09AFA07DD0434D9E2A0C6AEB0483103B976930@shsmsx102.ccr.corp.intel.com> In-Reply-To: <0C09AFA07DD0434D9E2A0C6AEB0483103B976930@shsmsx102.ccr.corp.intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 1/3] IntelSiliconPkg/VTdInfoPpi: Let it follow DMAR table. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 20 Sep 2017 06:30:49 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Agree! > -----Original Message----- > From: Zeng, Star > Sent: Wednesday, September 20, 2017 2:30 PM > To: Yao, Jiewen ; edk2-devel@lists.01.org > Cc: Zeng, Star > Subject: RE: [PATCH 1/3] IntelSiliconPkg/VTdInfoPpi: Let it follow DMAR t= able. >=20 > I think we'd better to add #include in > DmaRemappingReportingTable.h, but not VtdInfo.h. >=20 > Thanks, > Star > -----Original Message----- > From: Yao, Jiewen > Sent: Sunday, September 17, 2017 2:07 PM > To: edk2-devel@lists.01.org > Cc: Zeng, Star > Subject: [PATCH 1/3] IntelSiliconPkg/VTdInfoPpi: Let it follow DMAR table= . >=20 > We notice that there is real usage in PEI to show the graphic output. As = such we > need report RMRR table in PEI to let VTdPmrPei driver skip the IGD UMA re= gion. >=20 > Now the VTD_INFO PPI uses the same DMAR data structure. >=20 > Cc: Star Zeng > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Jiewen Yao > --- > IntelSiliconPkg/Include/Ppi/VtdInfo.h | 26 +++++++++++--------- > 1 file changed, 15 insertions(+), 11 deletions(-) >=20 > diff --git a/IntelSiliconPkg/Include/Ppi/VtdInfo.h > b/IntelSiliconPkg/Include/Ppi/VtdInfo.h > index e8be63f..a0a6f9c 100644 > --- a/IntelSiliconPkg/Include/Ppi/VtdInfo.h > +++ b/IntelSiliconPkg/Include/Ppi/VtdInfo.h > @@ -17,22 +17,26 @@ > #ifndef __VTD_INFO_PPI_H__ > #define __VTD_INFO_PPI_H__ >=20 > +#include > +#include > + > #define EDKII_VTD_INFO_PPI_GUID \ > { \ > 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 0xaf, 0x2b, 0x25, = 0x68, > 0x4a } \ > } >=20 > -typedef struct _EDKII_VTD_INFO_PPI EDKII_VTD_INFO_PPI; > - > -#define EDKII_VTD_INFO_PPI_REVISION 0x00010000 > - > -struct _EDKII_VTD_INFO_PPI { > - UINT64 Revision; > - UINT8 HostAddressWidth; > - UINT8 Reserved[3]; > - UINT32 VTdEngineCount; > - UINT64 VTdEngineAddress[1]; > -}; > +// > +// VTD info PPI just use same data structure as DMAR table. > +// > +// The reported information must include what is needed in PEI phase, e.= g. > +// the VTd engine (such as DRHD) > +// the reserved DMA address in PEI for eary graphic (such as RMRR for > graphic UMA) > +// > +// The reported information can be and might be a subset of full DMAR ta= ble, > e.g. > +// if some data is not avaiable (such as ANDD), > +// if some data is not needed (such as RMRR for legacy USB). > +// > +typedef EFI_ACPI_DMAR_HEADER EDKII_VTD_INFO_PPI; >=20 > extern EFI_GUID gEdkiiVTdInfoPpiGuid; >=20 > -- > 2.7.4.windows.1