From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=jiewen.yao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5E0A921E781E1 for ; Tue, 3 Oct 2017 17:46:47 -0700 (PDT) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP; 03 Oct 2017 17:50:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,475,1500966000"; d="scan'208";a="158511211" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga005.fm.intel.com with ESMTP; 03 Oct 2017 17:50:07 -0700 Received: from fmsmsx125.amr.corp.intel.com (10.18.125.40) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 3 Oct 2017 17:50:07 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by FMSMSX125.amr.corp.intel.com (10.18.125.40) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 3 Oct 2017 17:50:07 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.175]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.98]) with mapi id 14.03.0319.002; Wed, 4 Oct 2017 08:50:04 +0800 From: "Yao, Jiewen" To: Leo Duran , "edk2-devel@lists.01.org" Thread-Topic: [edk2] [PATCH v2 0/9] Enhanced SMM support to AMD-based x86 systems. Thread-Index: AQHTPJhmppHfNLGIGUeT2rM1HQjU66LS1SLQ Date: Wed, 4 Oct 2017 00:50:04 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503A9CE1F2@shsmsx102.ccr.corp.intel.com> References: <1507070305-6727-1-git-send-email-leo.duran@amd.com> In-Reply-To: <1507070305-6727-1-git-send-email-leo.duran@amd.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v2 0/9] Enhanced SMM support to AMD-based x86 systems. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 Oct 2017 00:46:47 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Thanks Leo. I agree we should support AMD-based X86, since the most code is sharable. [1] Comment for PcdCpuSmmSmramSaveStateMapOffset. I am a little concerned about the patch 6/9, because it is an incompatible = change. This change will cause all existing intel platform code change, to add PCD = in INF, such as OvmfPkg (patch 4/9) and QuarkPkg (patch 5/9). I am thinking an compatible way, to prevent existing intel platform code ch= ange. 1) We can define below according to Intel SDM and AMD SDM. #define INTEL_SMRAM_SAVE_STATE_MAP_OFFSET 0xfc00 #define AMD_SMRAM_SAVE_STATE_MAP_OFFSET 0xfe00 // This is to provide compatibility. #define SMRAM_SAVE_STATE_MAP_OFFSET INTEL_SMRAM_SAVE_STATE_MAP_OFFSET 2) Because the system has capability to *detect* the CPU, there is no need = to let user to *configure*. I do not suggest we use PCD. IMHO, it is more a system attribute, instead o= f a user configurable data. For example, a user cannot configure it to 0xFE= 00 for Intel CPU, or 0xFC00 for AMD CPU. 3) I think we can have a CPUID check in the entrypoint, and patch the OFFSE= T at anywhere. [2] Comment for PcdCpuSmmPSDOffset. I do not mind, since it is driver internal configuration and it won't break= the compatibility. Thank you Yao Jiewen > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Le= o > Duran > Sent: Wednesday, October 4, 2017 6:38 AM > To: edk2-devel@lists.01.org > Subject: [edk2] [PATCH v2 0/9] Enhanced SMM support to AMD-based x86 > systems. >=20 > UefiCpuPkg: > This patch-set introduces a couple of FixedPCDs to replace > Intel-specific macros, for SMM support on AMD-based x86 systems. >=20 > 1) PcdCpuSmmSmramSaveStateMapOffset - SMRAM Save State Map Offset. > 2) PcdCpuSmmPSDOffset - Processor SMM Descriptor Offset in SMRAM. >=20 > OvmfPkg and QuarkSocPkg: > The PcdCpuSmmSmramSaveStateMapOffset PCD is declared just to resolve > the macro replaced by the shared Library/SmmCpuFeaturesLib.h file. >=20 > Changes since v1: > Revision to Cc list for UefiCpuPkg. >=20 > Leo Duran (9): > UefiCpuPkg: UefiCpuPkg.dec > UefiCpuPkg: PiSmmCpuDxeSmm driver. > UefiCpuPkg: SmmCpuFeaturesLib library. > OvmfPkg: SmmCpuFeaturesLib library. > QuarkSocPkg: SmmCpuFeaturesLib library. > UefiCpuPkg: Register/SmramSaveStateMap.h > UefiCpuPkg: PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > UefiCpuPkg: PiSmmCpuDxeSmm driver. > UefiCpuPkg: SmmCpuFeaturesLib library. >=20 > OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf | 5 > +++++ > .../Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf | 4 > ++++ > UefiCpuPkg/Include/Register/SmramSaveStateMap.h | 4 > +++- > UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S | 4 > +++- > UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.asm | 4 > +++- > UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm | 4 > +++- > UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf | 5 > +++++ > UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf | 6 > ++++++ > UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.S | 4 > +++- > UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.asm | 4 > +++- > UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm | 4 > +++- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S | 4 > +++- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm | > 4 +++- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | > 4 +++- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > | 2 +- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf > | 4 ++++ > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S | > 4 +++- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm | > 4 +++- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | > 4 +++- > UefiCpuPkg/UefiCpuPkg.dec | 9 > +++++++++ > 20 files changed, 73 insertions(+), 14 deletions(-) >=20 > -- > 2.7.4 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel