From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=jiewen.yao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7C7C021CF58BF for ; Wed, 4 Oct 2017 17:45:44 -0700 (PDT) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP; 04 Oct 2017 17:49:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,479,1500966000"; d="scan'208";a="319697134" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga004.fm.intel.com with ESMTP; 04 Oct 2017 17:49:06 -0700 Received: from fmsmsx115.amr.corp.intel.com (10.18.116.19) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 4 Oct 2017 17:49:06 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by fmsmsx115.amr.corp.intel.com (10.18.116.19) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 4 Oct 2017 17:49:05 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.175]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.213]) with mapi id 14.03.0319.002; Thu, 5 Oct 2017 08:49:04 +0800 From: "Yao, Jiewen" To: Leo Duran , "edk2-devel@lists.01.org" Thread-Topic: [edk2] [PATCH v4 0/5] Enhanced SMM support for AMD-based x86 systems. Thread-Index: AQHTPUNripcq35aGaE+VnlxPItUqFKLUaz7g Date: Thu, 5 Oct 2017 00:49:03 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503A9CFB71@shsmsx102.ccr.corp.intel.com> References: <1507143747-18377-1-git-send-email-leo.duran@amd.com> In-Reply-To: <1507143747-18377-1-git-send-email-leo.duran@amd.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v4 0/5] Enhanced SMM support for AMD-based x86 systems. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 05 Oct 2017 00:45:45 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Leo I do not suggest we introduce PcdCpuSmmSmramSaveStateMapOffset. This is unnecessary, because it is CPU attribute but not some end user conf= igurable data. I think we can use CPUID to distinguish AMD from INTEL. Is that technically= possible? I found we already have code at=20 C:\home\EdkIIGit\edk2\UefiCpuPkg\Library\BaseXApicX2ApicLib\BaseXApicX2Ap= icLib.c(1206): if (StandardSignatureIsAuthenticAMD()) { C:\home\EdkIIGit\edk2\UefiCpuPkg\Library\BaseXApicLib\BaseXApicLib.c(1111= ): if (StandardSignatureIsAuthenticAMD()) { Thank you Yao Jiewen > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Le= o > Duran > Sent: Thursday, October 5, 2017 3:02 AM > To: edk2-devel@lists.01.org > Subject: [edk2] [PATCH v4 0/5] Enhanced SMM support for AMD-based x86 > systems. >=20 > This patch-set introduces a couple of FixedPCDs to replace > Intel-specific macros, and better support AMD-based x86 systems. >=20 > 1) PcdCpuSmmSmramSaveStateMapOffset - SMRAM Save State Map Offset. > 2) PcdCpuSmmPSDOffset - Processor SMM Descriptor Offset in SMRAM. >=20 > Changes since v3: > Correction on cover letter. >=20 > Changes since v2: > The intent of this revision is to maintain compatibility with existing > packages. To that end, changes to OvmgfPkg and QuarkSocPkg are reverted. > Moreover, pertinent macros are replaced in the C code, rather than on > header files that are shared globally. >=20 > Changes since v1: > Revision to Cc list for UefiCpuPkg. >=20 > Leo Duran (5): > UefiCpuPkg/UefiCpuPkg.dec: Create FixedPCDs for SMM support > UefiCpuPkg/PiSmmCpuDxeSmm: Consume FixedPCDs to enhance SMM > support > UefiCpuPkg/PiSmmCpuDxeSmm: Use FixedPCDs to enhance SMM support > UefiCpuPkg/SmmCpuFeaturesLib: Consume FixedPCD to enhance SMM > support > UefiCpuPkg/SmmCpuFeaturesLib: Use FixedPCD on non-STM library >=20 > UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 4 > +++- > UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf | 5 > +++++ > UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf | 5 > +++++ > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Semaphore.c | 4 > +++- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S | 4 > +++- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm | 4 > +++- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 4 > +++- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | > 10 +++++----- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | > 2 -- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | > 4 ++++ > UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c > | 4 +++- > UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c | 4 > +++- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/Semaphore.c | > 4 +++- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S | 4 > +++- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm | 4 > +++- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 4 > +++- > UefiCpuPkg/UefiCpuPkg.dec | 9 > +++++++++ > 17 files changed, 61 insertions(+), 18 deletions(-) >=20 > -- > 2.7.4 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel