From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=jiewen.yao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5B8A92034AB2D for ; Tue, 31 Oct 2017 01:20:44 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP; 31 Oct 2017 01:24:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,323,1505804400"; d="scan'208";a="1212265666" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga001.fm.intel.com with ESMTP; 31 Oct 2017 01:24:35 -0700 Received: from fmsmsx114.amr.corp.intel.com (10.18.116.8) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 31 Oct 2017 01:24:34 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX114.amr.corp.intel.com (10.18.116.8) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 31 Oct 2017 01:24:34 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.175]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.213]) with mapi id 14.03.0319.002; Tue, 31 Oct 2017 16:24:32 +0800 From: "Yao, Jiewen" To: "Ni, Ruiyu" , "edk2-devel@lists.01.org" CC: Michael Turner , "Kinney, Michael D" Thread-Topic: [PATCH] MdeModulePkg/PciBus: Disable BME of all devices when entering RT Thread-Index: AQHTUh1ttwv3839vykqjKOocTrSSKaL9nfGw Date: Tue, 31 Oct 2017 08:24:31 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503AA0A1FE@shsmsx102.ccr.corp.intel.com> References: <20171031075357.393144-1-ruiyu.ni@intel.com> In-Reply-To: <20171031075357.393144-1-ruiyu.ni@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZDZiZGQ3ZDAtYWIyNy00YzE4LTg3Y2MtM2UyNDNjNTY1ZDkxIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjIuNS4xOCIsIlRydXN0ZWRMYWJlbEhhc2giOiJ3RllKZXE2RTZsellHXC9UekJ2TUtGeG9ZUWJzV1JEYmpCWnA1OEtOTXAwTVQwWERcLzhrWGw3NjBOWWFqUG9XSWYifQ== x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] MdeModulePkg/PciBus: Disable BME of all devices when entering RT X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 31 Oct 2017 08:20:44 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable The patch seems good. But the commit message is quite confusing. Disabling BME does not have any assumption on the existence of IOMMU protec= tion. No matter a platform with IOMMU protection, or without IOMMU protection, th= is solution always works. I suggest to change commit message to be: The patch ensures all DMA transactions are blocked at ExitBootService. If a platform enables IOMMU before and need disable IOMMU at ExitBootServic= e, the IOMMU should be disabled after PCI bus driver disable BME.=20 Thank you Yao Jiewen > -----Original Message----- > From: Ni, Ruiyu > Sent: Tuesday, October 31, 2017 3:54 PM > To: edk2-devel@lists.01.org > Cc: Michael Turner ; Kinney, Michael D > ; Yao, Jiewen > Subject: [PATCH] MdeModulePkg/PciBus: Disable BME of all devices when > entering RT >=20 > The patch assumes IOMMU protections are disabled after PciBus > disables the BMT bit in Command register. > It ensures all DMA transactions are protected by IOMMU. >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Michael Turner > Signed-off-by: Ruiyu Ni > Cc: Michael D Kinney > Cc: Jiewen Yao > --- > MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 2 + > MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 3 + > MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c | 86 > +++++++++++++++++++++++ > 3 files changed, 91 insertions(+) >=20 > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h > index 55eb3a5a80..79b5b71082 100644 > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h > @@ -18,6 +18,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, > EITHER EXPRESS OR IMPLIED. >=20 > #include >=20 > +#include > + > #include > #include > #include > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > index 97608bfcf2..d5b8fab3ca 100644 > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > @@ -80,6 +80,9 @@ [LibraryClasses] > DebugLib > PeCoffLib >=20 > +[Guids] > + gEfiEventExitBootServicesGuid ## > SOMETIMES_CONSUMES ## Event > + > [Protocols] > gEfiPciHotPlugRequestProtocolGuid ## > SOMETIMES_PRODUCES > gEfiPciIoProtocolGuid ## BY_START > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c > index 97bb971a59..b5530a13d1 100644 > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c > @@ -21,6 +21,72 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY > KIND, EITHER EXPRESS OR IMPLIED. > LIST_ENTRY mPciDevicePool; >=20 > /** > + Disable Bus Master Enable bit in all devices in the list. > + > + @param Devices A device list. > +**/ > +VOID > +DisableBmeOnTree ( > + IN LIST_ENTRY *Devices > + ) > +{ > + LIST_ENTRY *Link; > + PCI_IO_DEVICE *PciIoDevice; > + UINT16 Command; > + > + for ( Link =3D GetFirstNode (Devices) > + ; !IsNull (Devices, Link) > + ; Link =3D GetNextNode (Devices, Link) > + ) { > + PciIoDevice =3D PCI_IO_DEVICE_FROM_LINK (Link); > + // > + // Turn off all children's Bus Master, if any > + // > + DisableBmeOnTree (&PciIoDevice->ChildList); > + > + // > + // If this is a device that supports BME, disable BME on this device= . > + // > + if ((PciIoDevice->Supports & EFI_PCI_IO_ATTRIBUTE_BUS_MASTER) !=3D 0= ) { > + PCI_READ_COMMAND_REGISTER(PciIoDevice, &Command); > + if ((Command & EFI_PCI_COMMAND_BUS_MASTER) !=3D 0) { > + Command &=3D ~EFI_PCI_COMMAND_BUS_MASTER; > + PCI_SET_COMMAND_REGISTER (PciIoDevice, Command); > + DEBUG (( > + EFI_D_INFO," %02x %02x %02x %04x\n", > + PciIoDevice->BusNumber, PciIoDevice->DeviceNumber, > PciIoDevice->FunctionNumber, > + Command > + )); > + } > + } > + } > +} > + > +/** > + Exit Boot Services Event notification handler. > + > + Disable Bus Master on any that were enabled during BDS. > + > + @param[in] Event Event whose notification function is being invok= ed. > + @param[in] Context Pointer to the notification function's context. > + > +**/ > +VOID > +EFIAPI > +OnExitBootServices ( > + IN EFI_EVENT Event, > + IN VOID *Context > + ) > +{ > + DEBUG (( > + DEBUG_INFO, > + "PciBus: Disable Bus Master of all devices...\n" > + " Bus# Device# Function# NewCommand\n" > + )); > + DisableBmeOnTree(&mPciDevicePool); > +} > + > +/** > Initialize the PCI devices pool. >=20 > **/ > @@ -29,7 +95,27 @@ InitializePciDevicePool ( > VOID > ) > { > + EFI_EVENT ExitBootServicesEvent; > + EFI_STATUS Status; > + > InitializeListHead (&mPciDevicePool); > + > + // > + // DisableBME on ExitBootServices should be synchonized with any IOMMU > ExitBootServices routine. > + // DisableBME should be run before the IOMMU protections are disabled. > + // One way to do this is to ensure that the IOMMU ExitBootServices cal= lback > runs at TPL_CALLBACK. > + // > + Status =3D gBS->CreateEventEx ( > + EVT_NOTIFY_SIGNAL, > + TPL_NOTIFY, > + OnExitBootServices, > + NULL, > + &gEfiEventExitBootServicesGuid, > + &ExitBootServicesEvent > + ); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "PciBus: Unable to hook ExitBootServices event > - %r\n", Status)); > + } > } >=20 > /** > -- > 2.12.2.windows.2