From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.20; helo=mga02.intel.com; envelope-from=jiewen.yao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 833AC2034A764 for ; Mon, 27 Nov 2017 19:02:58 -0800 (PST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Nov 2017 19:07:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,466,1505804400"; d="scan'208";a="12728256" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga002.jf.intel.com with ESMTP; 27 Nov 2017 19:07:20 -0800 Received: from fmsmsx115.amr.corp.intel.com (10.18.116.19) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 27 Nov 2017 19:07:20 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx115.amr.corp.intel.com (10.18.116.19) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 27 Nov 2017 19:07:19 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.175]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.93]) with mapi id 14.03.0319.002; Tue, 28 Nov 2017 11:07:17 +0800 From: "Yao, Jiewen" To: "Chiu, Chasel" , "edk2-devel@lists.01.org" Thread-Topic: [edk2] [PATCH] IntelFsp2WrapperPkg: Support UPD allocation outside FspWrapper Thread-Index: AQHTZAMGHJF+4yoX80CB0wkv6+CImqMpI+7A Date: Tue, 28 Nov 2017 03:07:17 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503AA2EE1E@shsmsx102.ccr.corp.intel.com> References: <20171123023003.10552-1-chasel.chiu@intel.com> In-Reply-To: <20171123023003.10552-1-chasel.chiu@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYzI4MjZjMWEtNDhlZC00YWEyLWI3NjktNzdlNTA0OWI3M2YzIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjIuNS4xOCIsIlRydXN0ZWRMYWJlbEhhc2giOiJNYlgwakFPbFlhbHEyUVprbW9aaGxjWXVyZkFDUVpkMFFOQUFNcnl1WUJTWkREbkpFeUJjeGlseExyWVFtcE1cLyJ9 x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] IntelFsp2WrapperPkg: Support UPD allocation outside FspWrapper X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 28 Nov 2017 03:02:58 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Jiewen.yao@intel.com > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Ch= asel, > Chiu > Sent: Thursday, November 23, 2017 10:30 AM > To: edk2-devel@lists.01.org > Cc: Yao, Jiewen > Subject: [edk2] [PATCH] IntelFsp2WrapperPkg: Support UPD allocation outsi= de > FspWrapper >=20 > UPD allocation and patching can be done outside FspWrapper > as implementation choice so adding a PCD to select between > original FspWrapper allocation model or outside model >=20 > Cc: Jiewen Yao > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Chasel Chiu > --- > .../FspmWrapperPeim/FspmWrapperPeim.c | 25 ++++--- > .../FspmWrapperPeim/FspmWrapperPeim.inf | 3 +- > .../FspsWrapperPeim/FspsWrapperPeim.c | 84 > +++++++++++----------- > .../FspsWrapperPeim/FspsWrapperPeim.inf | 3 +- > IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 13 +++- > 5 files changed, 76 insertions(+), 52 deletions(-) >=20 > diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > index f1d1cd6421..7b7c5f5d86 100644 > --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > @@ -3,7 +3,7 @@ > register TemporaryRamDonePpi to call TempRamExit API, and register > MemoryDiscoveredPpi > notify to call FspSiliconInit API. >=20 > - Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the = BSD > License > which accompanies this distribution. The full text of the license may= be > found at > @@ -63,20 +63,29 @@ PeiFspMemoryInit ( > DEBUG ((DEBUG_INFO, "PeiFspMemoryInit enter\n")); >=20 > FspHobListPtr =3D NULL; > + FspmUpdDataPtr =3D NULL; >=20 > - // > - // Copy default FSP-M UPD data from Flash > - // > FspmHeaderPtr =3D (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 > (PcdFspmBaseAddress)); > DEBUG ((DEBUG_INFO, "FspmHeaderPtr - 0x%x\n", FspmHeaderPtr)); > if (FspmHeaderPtr =3D=3D NULL) { > return EFI_DEVICE_ERROR; > } >=20 > - FspmUpdDataPtr =3D (FSPM_UPD_COMMON *)AllocateZeroPool > ((UINTN)FspmHeaderPtr->CfgRegionSize); > - ASSERT (FspmUpdDataPtr !=3D NULL); > - SourceData =3D (UINTN *)((UINTN)FspmHeaderPtr->ImageBase + > (UINTN)FspmHeaderPtr->CfgRegionOffset); > - CopyMem (FspmUpdDataPtr, SourceData, > (UINTN)FspmHeaderPtr->CfgRegionSize); > + if (PcdGet32 (PcdFspmUpdDataAddress) =3D=3D 0 && > (FspmHeaderPtr->CfgRegionSize !=3D 0) && (FspmHeaderPtr->CfgRegionOffset = !=3D > 0)) { > + // > + // Copy default FSP-M UPD data from Flash > + // > + FspmUpdDataPtr =3D (FSPM_UPD_COMMON *)AllocateZeroPool > ((UINTN)FspmHeaderPtr->CfgRegionSize); > + ASSERT (FspmUpdDataPtr !=3D NULL); > + SourceData =3D (UINTN *)((UINTN)FspmHeaderPtr->ImageBase + > (UINTN)FspmHeaderPtr->CfgRegionOffset); > + CopyMem (FspmUpdDataPtr, SourceData, > (UINTN)FspmHeaderPtr->CfgRegionSize); > + } else { > + // > + // External UPD is ready, get the buffer from PCD pointer. > + // > + FspmUpdDataPtr =3D (FSPM_UPD_COMMON *)PcdGet32 > (PcdFspmUpdDataAddress); > + ASSERT (FspmUpdDataPtr !=3D NULL); > + } >=20 > DEBUG ((DEBUG_INFO, "UpdateFspmUpdData enter\n")); > UpdateFspmUpdData ((VOID *)FspmUpdDataPtr); > diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > index 2b3d240d08..542356b582 100644 > --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > @@ -59,7 +59,8 @@ > IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec >=20 > [Pcd] > - gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## > CONSUMES > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress ## > CONSUMES >=20 > [Sources] > FspmWrapperPeim.c > diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > index ddc19c7e8f..70dac7a414 100644 > --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > @@ -3,7 +3,7 @@ > register TemporaryRamDonePpi to call TempRamExit API, and register > MemoryDiscoveredPpi > notify to call FspSiliconInit API. >=20 > - Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the = BSD > License > which accompanies this distribution. The full text of the license may= be > found at > @@ -44,14 +44,14 @@ extern EFI_PEI_NOTIFY_DESCRIPTOR > mS3EndOfPeiNotifyDesc; > extern EFI_GUID gFspHobGuid; >=20 > /** > -This function handles S3 resume task at the end of PEI > + This function handles S3 resume task at the end of PEI >=20 > -@param[in] PeiServices Pointer to PEI Services Table. > -@param[in] NotifyDesc Pointer to the descriptor for the Notification= event > that > -caused this function to execute. > -@param[in] Ppi Pointer to the PPI data associated with this > function. > + @param[in] PeiServices Pointer to PEI Services Table. > + @param[in] NotifyDesc Pointer to the descriptor for the Notificati= on > event that > + caused this function to execute. > + @param[in] Ppi Pointer to the PPI data associated with this > function. >=20 > -@retval EFI_STATUS Always return EFI_SUCCESS > + @retval EFI_STATUS Always return EFI_SUCCESS > **/ > EFI_STATUS > EFIAPI > @@ -68,14 +68,14 @@ EFI_PEI_NOTIFY_DESCRIPTOR mS3EndOfPeiNotifyDesc > =3D { > }; >=20 > /** > -This function handles S3 resume task at the end of PEI > + This function handles S3 resume task at the end of PEI >=20 > -@param[in] PeiServices Pointer to PEI Services Table. > -@param[in] NotifyDesc Pointer to the descriptor for the Notification= event > that > -caused this function to execute. > -@param[in] Ppi Pointer to the PPI data associated with this > function. > + @param[in] PeiServices Pointer to PEI Services Table. > + @param[in] NotifyDesc Pointer to the descriptor for the Notificati= on > event that > + caused this function to execute. > + @param[in] Ppi Pointer to the PPI data associated with this > function. >=20 > -@retval EFI_STATUS Always return EFI_SUCCESS > + @retval EFI_STATUS Always return EFI_SUCCESS > **/ > EFI_STATUS > EFIAPI > @@ -130,13 +130,13 @@ S3EndOfPeiNotify( > } >=20 > /** > -Return Hob list produced by FSP. > + Return Hob list produced by FSP. >=20 > -@param[in] PeiServices The pointer to the PEI Services Table. > -@param[in] This The pointer to this instance of this PPI. > -@param[out] FspHobList The pointer to Hob list produced by FSP. > + @param[in] PeiServices The pointer to the PEI Services Table. > + @param[in] This The pointer to this instance of this PPI. > + @param[out] FspHobList The pointer to Hob list produced by FSP. >=20 > -@return EFI_SUCCESS FReturn Hob list produced by FSP successfully. > + @return EFI_SUCCESS FReturn Hob list produced by FSP successfully. > **/ > EFI_STATUS > EFIAPI > @@ -157,13 +157,13 @@ EFI_PEI_PPI_DESCRIPTOR > mPeiFspSiliconInitDonePpi =3D { > }; >=20 > /** > -Return Hob list produced by FSP. > + Return Hob list produced by FSP. >=20 > -@param[in] PeiServices The pointer to the PEI Services Table. > -@param[in] This The pointer to this instance of this PPI. > -@param[out] FspHobList The pointer to Hob list produced by FSP. > + @param[in] PeiServices The pointer to the PEI Services Table. > + @param[in] This The pointer to this instance of this PPI. > + @param[out] FspHobList The pointer to Hob list produced by FSP. >=20 > -@return EFI_SUCCESS FReturn Hob list produced by FSP successfully. > + @return EFI_SUCCESS FReturn Hob list produced by FSP successfully. > **/ > EFI_STATUS > EFIAPI > @@ -209,14 +209,14 @@ EFI_PEI_NOTIFY_DESCRIPTOR > mPeiMemoryDiscoveredNotifyDesc =3D { > }; >=20 > /** > -This function is called after PEI core discover memory and finish migrat= ion. > + This function is called after PEI core discover memory and finish migr= ation. >=20 > -@param[in] PeiServices Pointer to PEI Services Table. > -@param[in] NotifyDesc Pointer to the descriptor for the Notification= event > that > -caused this function to execute. > -@param[in] Ppi Pointer to the PPI data associated with this > function. > + @param[in] PeiServices Pointer to PEI Services Table. > + @param[in] NotifyDesc Pointer to the descriptor for the Notificati= on > event that > + caused this function to execute. > + @param[in] Ppi Pointer to the PPI data associated with this > function. >=20 > -@retval EFI_STATUS Always return EFI_SUCCESS > + @retval EFI_STATUS Always return EFI_SUCCESS > **/ > EFI_STATUS > EFIAPI > @@ -234,22 +234,27 @@ PeiMemoryDiscoveredNotify ( > FSPS_UPD_COMMON *FspsUpdDataPtr; > UINTN *SourceData; >=20 > - > DEBUG ((DEBUG_INFO, "PeiMemoryDiscoveredNotify enter\n")); > - > - // > - // Copy default FSP-S UPD data from Flash > - // > + FspsUpdDataPtr =3D NULL; > + > FspsHeaderPtr =3D (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 > (PcdFspsBaseAddress)); > DEBUG ((DEBUG_INFO, "FspsHeaderPtr - 0x%x\n", FspsHeaderPtr)); > if (FspsHeaderPtr =3D=3D NULL) { > return EFI_DEVICE_ERROR; > } >=20 > - FspsUpdDataPtr =3D (FSPS_UPD_COMMON *)AllocateZeroPool > ((UINTN)FspsHeaderPtr->CfgRegionSize); > - ASSERT (FspsUpdDataPtr !=3D NULL); > - SourceData =3D (UINTN *)((UINTN)FspsHeaderPtr->ImageBase + > (UINTN)FspsHeaderPtr->CfgRegionOffset); > - CopyMem (FspsUpdDataPtr, SourceData, > (UINTN)FspsHeaderPtr->CfgRegionSize); > + if (PcdGet32 (PcdFspsUpdDataAddress) =3D=3D 0 && > (FspsHeaderPtr->CfgRegionSize !=3D 0) && (FspsHeaderPtr->CfgRegionOffset = !=3D 0)) > { > + // > + // Copy default FSP-S UPD data from Flash > + // > + FspsUpdDataPtr =3D (FSPS_UPD_COMMON *)AllocateZeroPool > ((UINTN)FspsHeaderPtr->CfgRegionSize); > + ASSERT (FspsUpdDataPtr !=3D NULL); > + SourceData =3D (UINTN *)((UINTN)FspsHeaderPtr->ImageBase + > (UINTN)FspsHeaderPtr->CfgRegionOffset); > + CopyMem (FspsUpdDataPtr, SourceData, > (UINTN)FspsHeaderPtr->CfgRegionSize); > + } else { > + FspsUpdDataPtr =3D (FSPS_UPD_COMMON *)PcdGet32 > (PcdFspsUpdDataAddress); > + ASSERT (FspsUpdDataPtr !=3D NULL); > + } >=20 > UpdateFspsUpdData ((VOID *)FspsUpdDataPtr); >=20 > @@ -314,7 +319,7 @@ FspsWrapperInit ( > // > Status =3D PeiServicesNotifyPpi (&mPeiMemoryDiscoveredNotifyDesc); > ASSERT_EFI_ERROR (Status); > - > + > // > // Register EndOfPei Notify for S3 to run FSP NotifyPhase > // > @@ -342,7 +347,6 @@ FspsWrapperPeimEntryPoint ( > IN CONST EFI_PEI_SERVICES **PeiServices > ) > { > - > DEBUG ((DEBUG_INFO, "FspsWrapperPeimEntryPoint\n")); >=20 > FspsWrapperInit (); > diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > index c858e7097d..cd87a99c40 100644 > --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > @@ -66,7 +66,8 @@ > gEfiPeiMemoryDiscoveredPpiGuid ## NOTIFY >=20 > [Pcd] > - gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## > CONSUMES > + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress ## > CONSUMES >=20 > [Guids] > gFspHobGuid ## CONSUMES ## HOB > diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > index c0881852c5..7634619f80 100644 > --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > @@ -1,7 +1,7 @@ > ## @file > # Provides drivers and definitions to support fsp in EDKII bios. > # > -# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
> +# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
> # This program and the accompanying materials are licensed and made > available under > # the terms and conditions of the BSD License that accompanies this > distribution. > # The full text of the license may be found at > @@ -95,4 +95,13 @@ >=20 > [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx] >=20 > gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32| > 0x00001001 > - > \ No newline at end of file > + # > + # To provide flexibility for platform to pre-allocate FSP UPD buffer > + # > + # The PCDs define the pre-allocated FSPM and FSPS UPD Data Buffer > Address. > + # 0x00000000 - Platform will not pre-allocate UPD buffer before > FspWrapper module > + # non-zero - Platform will pre-allocate UPD buffer and patch this va= lue to > + # buffer address before FspWrapper module executing. > + # > + > gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0x00000000|UI > NT32|0x50000000 > + > gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000|UIN > T32|0x50000001 > \ No newline at end of file > -- > 2.13.3.windows.1 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel