From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=jiewen.yao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C51D5222A54FF for ; Wed, 3 Jan 2018 22:08:54 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Jan 2018 22:13:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,506,1508828400"; d="scan'208";a="7282485" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga008.fm.intel.com with ESMTP; 03 Jan 2018 22:13:55 -0800 Received: from fmsmsx120.amr.corp.intel.com (10.18.124.208) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 3 Jan 2018 22:13:54 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by fmsmsx120.amr.corp.intel.com (10.18.124.208) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 3 Jan 2018 22:13:54 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.189]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.213]) with mapi id 14.03.0319.002; Thu, 4 Jan 2018 14:13:53 +0800 From: "Yao, Jiewen" To: "Zeng, Star" , "edk2-devel@lists.01.org" Thread-Topic: [PATCH] IntelSiliconPkg IntelVTdDxe: Use TPL to protect list/engine operation Thread-Index: AQHThQyoTjl+v+VsWkC4W8upycGJMKNjO/Zw Date: Thu, 4 Jan 2018 06:13:52 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503AA6FDBB@shsmsx102.ccr.corp.intel.com> References: <1515036740-16812-1-git-send-email-star.zeng@intel.com> In-Reply-To: <1515036740-16812-1-git-send-email-star.zeng@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNzIzNmFmMmUtMzAxNy00MDlkLTg1ZTgtMjA4ZDg0NGI5NWY4IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjIuNS4xOCIsIlRydXN0ZWRMYWJlbEhhc2giOiJBejlWRUllb3pPbVQ2QXdJVjc3emxBNUVTMXR6M2cyalNZOVJCZXVKQWhIN01cL1pIdzJibytKazdaanA3ZkRLcCJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] IntelSiliconPkg IntelVTdDxe: Use TPL to protect list/engine operation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jan 2018 06:08:55 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable It is good to have lock for linked list management. However, I do not think we should update TPM for ExitBootServices/LegacyBoo= t. I purposely use TPL_CALLBACK to make sure VTd is tear down later, so that o= ther driver can stop DMA before that. Thank you Yao Jiewen > -----Original Message----- > From: Zeng, Star > Sent: Thursday, January 4, 2018 11:32 AM > To: edk2-devel@lists.01.org > Cc: Zeng, Star ; Yao, Jiewen > Subject: [PATCH] IntelSiliconPkg IntelVTdDxe: Use TPL to protect list/eng= ine > operation >=20 > Cc: Jiewen Yao > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Star Zeng > --- > IntelSiliconPkg/Feature/VTd/IntelVTdDxe/BmDma.c | 19 ++++++------- > .../Feature/VTd/IntelVTdDxe/DmaProtection.c | 8 +++--- > .../Feature/VTd/IntelVTdDxe/DmaProtection.h | 2 ++ > .../Feature/VTd/IntelVTdDxe/IntelVTdDxe.c | 32 > +++++++++------------- > 4 files changed, 28 insertions(+), 33 deletions(-) >=20 > diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/BmDma.c > b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/BmDma.c > index e8685666e79a..57e086a64dbc 100644 > --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/BmDma.c > +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/BmDma.c > @@ -1,7 +1,7 @@ > /** @file > BmDma related function >=20 > - Copyright (c) 2017, Intel Corporation. All rights reserved.
> + Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the = BSD > License > which accompanies this distribution. The full text of the license may= be > found at > @@ -12,15 +12,7 @@ >=20 > **/ >=20 > -#include > - > -#include > - > -#include > -#include > -#include > -#include > -#include > +#include "DmaProtection.h" >=20 > // TBD: May make it a policy > #define DMA_MEMORY_TOP MAX_UINTN > @@ -76,6 +68,7 @@ IoMmuMap ( > MAP_INFO *MapInfo; > EFI_PHYSICAL_ADDRESS > DmaMemoryTop; > BOOLEAN NeedRemap; > + EFI_TPL OriginalTpl; >=20 > if (NumberOfBytes =3D=3D NULL || DeviceAddress =3D=3D NULL || > Mapping =3D=3D NULL) { > @@ -198,7 +191,9 @@ IoMmuMap ( > MapInfo->DeviceAddress =3D MapInfo->HostAddress; > } >=20 > + OriginalTpl =3D gBS->RaiseTPL (VTD_TPL_LEVEL); > InsertTailList (&gMaps, &MapInfo->Link); > + gBS->RestoreTPL (OriginalTpl); >=20 > // > // The DeviceAddress is the address of the maped buffer below 4GB > @@ -233,6 +228,7 @@ IoMmuUnmap ( > { > MAP_INFO *MapInfo; > LIST_ENTRY *Link; > + EFI_TPL OriginalTpl; >=20 > DEBUG ((DEBUG_VERBOSE, "IoMmuUnmap: 0x%08x\n", Mapping)); >=20 > @@ -241,6 +237,7 @@ IoMmuUnmap ( > return EFI_INVALID_PARAMETER; > } >=20 > + OriginalTpl =3D gBS->RaiseTPL (VTD_TPL_LEVEL); > MapInfo =3D NULL; > for (Link =3D GetFirstNode (&gMaps) > ; !IsNull (&gMaps, Link) > @@ -255,10 +252,12 @@ IoMmuUnmap ( > // Mapping is not a valid value returned by Map() > // > if (MapInfo !=3D Mapping) { > + gBS->RestoreTPL (OriginalTpl); > DEBUG ((DEBUG_ERROR, "IoMmuUnmap: %r\n", > EFI_INVALID_PARAMETER)); > return EFI_INVALID_PARAMETER; > } > RemoveEntryList (&MapInfo->Link); > + gBS->RestoreTPL (OriginalTpl); >=20 > if (MapInfo->DeviceAddress !=3D MapInfo->HostAddress) { > // > diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.c > b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.c > index 648f64c20b77..013823cc161f 100644 > --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.c > +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.c > @@ -478,7 +478,7 @@ InitializeDmaProtection ( >=20 > Status =3D gBS->CreateEventEx ( > EVT_NOTIFY_SIGNAL, > - TPL_CALLBACK, > + VTD_TPL_LEVEL, > AcpiNotificationFunc, > NULL, > &gEfiAcpi10TableGuid, > @@ -488,7 +488,7 @@ InitializeDmaProtection ( >=20 > Status =3D gBS->CreateEventEx ( > EVT_NOTIFY_SIGNAL, > - TPL_CALLBACK, > + VTD_TPL_LEVEL, > AcpiNotificationFunc, > NULL, > &gEfiAcpi20TableGuid, > @@ -505,7 +505,7 @@ InitializeDmaProtection ( >=20 > Status =3D gBS->CreateEventEx ( > EVT_NOTIFY_SIGNAL, > - TPL_CALLBACK, > + VTD_TPL_LEVEL, > OnExitBootServices, > NULL, > &gEfiEventExitBootServicesGuid, > @@ -514,7 +514,7 @@ InitializeDmaProtection ( > ASSERT_EFI_ERROR (Status); >=20 > Status =3D EfiCreateEventLegacyBootEx ( > - TPL_CALLBACK, > + VTD_TPL_LEVEL, > OnLegacyBoot, > NULL, > &LegacyBootEvent > diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h > b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h > index 519a5ab00450..bc14ff9a6631 100644 > --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h > +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h > @@ -48,6 +48,8 @@ > #define ALIGN_VALUE_UP(Value, Alignment) (((Value) + (Alignment) - 1) & > (~((Alignment) - 1))) > #define ALIGN_VALUE_LOW(Value, Alignment) ((Value) & (~((Alignment) - 1)= )) >=20 > +#define VTD_TPL_LEVEL TPL_NOTIFY > + > // > // This is the initial max PCI DATA number. > // The number may be enlarged later. > diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.c > b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.c > index 89d9bea3fc0f..570b47cf7364 100644 > --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.c > +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.c > @@ -12,16 +12,6 @@ >=20 > **/ >=20 > -#include > - > -#include > -#include > - > -#include > -#include > -#include > -#include > - > #include "DmaProtection.h" >=20 > /** > @@ -306,18 +296,22 @@ IoMmuSetAttribute ( > EFI_STATUS Status; > EFI_PHYSICAL_ADDRESS DeviceAddress; > UINTN NumberOfPages; > + EFI_TPL OriginalTpl; > + > + OriginalTpl =3D gBS->RaiseTPL (VTD_TPL_LEVEL); >=20 > Status =3D GetDeviceInfoFromMapping (Mapping, &DeviceAddress, > &NumberOfPages); > - if (EFI_ERROR(Status)) { > - return Status; > + if (!EFI_ERROR(Status)) { > + Status =3D VTdSetAttribute ( > + This, > + DeviceHandle, > + DeviceAddress, > + EFI_PAGES_TO_SIZE(NumberOfPages), > + IoMmuAccess > + ); > } > - Status =3D VTdSetAttribute ( > - This, > - DeviceHandle, > - DeviceAddress, > - EFI_PAGES_TO_SIZE(NumberOfPages), > - IoMmuAccess > - ); > + > + gBS->RestoreTPL (OriginalTpl); >=20 > return Status; > } > -- > 2.7.0.windows.1