From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=jiewen.yao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2AF3D2035D311 for ; Tue, 16 Jan 2018 17:04:54 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Jan 2018 17:10:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,369,1511856000"; d="scan'208";a="10955311" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga008.fm.intel.com with ESMTP; 16 Jan 2018 17:10:13 -0800 Received: from fmsmsx155.amr.corp.intel.com (10.18.116.71) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 16 Jan 2018 17:10:13 -0800 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by FMSMSX155.amr.corp.intel.com (10.18.116.71) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 16 Jan 2018 17:10:12 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.189]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.152]) with mapi id 14.03.0319.002; Wed, 17 Jan 2018 09:10:11 +0800 From: "Yao, Jiewen" To: "Zeng, Star" , "edk2-devel@lists.01.org" CC: "Zeng, Star" Thread-Topic: [edk2] [PATCH] IntelSiliconPkg IntelVTdDxe: Remove mVtdHostAddressWidthMask Thread-Index: AQHTjrnhiOXNQDHJ6kePXkfKuLSbb6N3QlYg Date: Wed, 17 Jan 2018 01:10:10 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503AA7FA22@shsmsx102.ccr.corp.intel.com> References: <1516100696-15672-1-git-send-email-star.zeng@intel.com> In-Reply-To: <1516100696-15672-1-git-send-email-star.zeng@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiOWM5MDliMjctNTZkMC00N2JjLWJhZjYtMDg5MWNiODUzMjY3IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjIuNS4xOCIsIlRydXN0ZWRMYWJlbEhhc2giOiJOXC9QRXM3bkY0NVwveVplZ3JCbm5OUHVWa2FBTUdScm1EVlh2d3BWS0p4THg3NzlRNlBwSTRVYjdaWThPZGpUVW4ifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] IntelSiliconPkg IntelVTdDxe: Remove mVtdHostAddressWidthMask X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Jan 2018 01:04:54 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Jiewen.yao@intel.com > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of St= ar > Zeng > Sent: Tuesday, January 16, 2018 7:05 PM > To: edk2-devel@lists.01.org > Cc: Yao, Jiewen ; Zeng, Star > Subject: [edk2] [PATCH] IntelSiliconPkg IntelVTdDxe: Remove > mVtdHostAddressWidthMask >=20 > mVtdHostAddressWidthMask is not been used at all, > its definition and related code could be removed. >=20 > Cc: Jiewen Yao > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Star Zeng > --- > IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h | 1 - > IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c | 2 -- > IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c | 3 +-- > 3 files changed, 1 insertion(+), 5 deletions(-) >=20 > diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h > b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h > index 767531e4a93f..2ec92fe523c3 100644 > --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h > +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h > @@ -124,7 +124,6 @@ EFI_STATUS >=20 > extern EFI_ACPI_DMAR_HEADER *mAcpiDmarTable; >=20 > -extern UINT64 mVtdHostAddressWidthMask; > extern UINTN mVtdUnitNumber; > extern VTD_UNIT_INFORMATION *mVtdUnitInformation; >=20 > diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c > b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c > index 342830a01fb0..24ad47edc543 100644 > --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c > +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c > @@ -806,8 +806,6 @@ ParseDmarAcpiTableDrhd ( > return EFI_OUT_OF_RESOURCES; > } >=20 > - mVtdHostAddressWidthMask =3D LShiftU64 (1ull, > mAcpiDmarTable->HostAddressWidth) - 1; > - > VtdIndex =3D 0; > DmarHeader =3D (EFI_ACPI_DMAR_STRUCTURE_HEADER > *)((UINTN)(mAcpiDmarTable + 1)); > while ((UINTN)DmarHeader < (UINTN)mAcpiDmarTable + > mAcpiDmarTable->Header.Length) { > diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c > b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c > index 1404af7cd781..bc9f427a3686 100644 > --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c > +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c > @@ -1,6 +1,6 @@ > /** @file >=20 > - Copyright (c) 2017, Intel Corporation. All rights reserved.
> + Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the = BSD > License > which accompanies this distribution. The full text of the license may= be > found at > @@ -13,7 +13,6 @@ >=20 > #include "DmaProtection.h" >=20 > -UINT64 mVtdHostAddressWidthMask; > UINTN mVtdUnitNumber; > VTD_UNIT_INFORMATION *mVtdUnitInformation; >=20 > -- > 2.7.0.windows.1 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel