From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=jiewen.yao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 636CB2255D6FF for ; Mon, 5 Mar 2018 14:32:09 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Mar 2018 14:38:23 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.47,428,1515484800"; d="scan'208";a="35709932" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga001.fm.intel.com with ESMTP; 05 Mar 2018 14:38:22 -0800 Received: from fmsmsx122.amr.corp.intel.com (10.18.125.37) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 5 Mar 2018 14:38:22 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx122.amr.corp.intel.com (10.18.125.37) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 5 Mar 2018 14:38:22 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.124]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.130]) with mapi id 14.03.0319.002; Tue, 6 Mar 2018 06:38:20 +0800 From: "Yao, Jiewen" To: "Zeng, Star" , "edk2-devel@lists.01.org" Thread-Topic: [PATCH] IntelSiliconPkg VTdPmrPei: Add PcdVTdPeiDmaBufferSize(S3) Thread-Index: AQHTtIy4bNUNFAs+f0igEyI7n8+Kq6PCPChQ Date: Mon, 5 Mar 2018 22:38:19 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503AADD24F@shsmsx102.ccr.corp.intel.com> References: <20180305141725.11464-1-star.zeng@intel.com> In-Reply-To: <20180305141725.11464-1-star.zeng@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiN2RlYzYwOWEtOTRjOS00NGQ1LTg1NDYtOGYwOWJlMTkwYzdkIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjIuNS4xOCIsIlRydXN0ZWRMYWJlbEhhc2giOiI3eDNoQjk2b3dDTUVQQnk0aVFjXC9kK0VadUdmTnlKZmZ2OEhrXC9qVkJaWmxoajBDdDJSRnk2TmVBTDloYmt0SWwifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] IntelSiliconPkg VTdPmrPei: Add PcdVTdPeiDmaBufferSize(S3) X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 05 Mar 2018 22:32:10 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Jiewen.yao@intel.com > -----Original Message----- > From: Zeng, Star > Sent: Monday, March 5, 2018 10:17 PM > To: edk2-devel@lists.01.org > Cc: Zeng, Star ; Yao, Jiewen > Subject: [PATCH] IntelSiliconPkg VTdPmrPei: Add PcdVTdPeiDmaBufferSize(S3= ) >=20 > Add PcdVTdPeiDmaBufferSize(S3) to replace the hard coded value > TOTAL_DMA_BUFFER_SIZE and TOTAL_DMA_BUFFER_SIZE_S3 in > IntelVTdPmrPei. >=20 > Cc: Jiewen Yao > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Star Zeng > --- > .../Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c | 7 ++----- > .../Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf | 4 +++- > IntelSiliconPkg/IntelSiliconPkg.dec | 18 > +++++++++++++++++- > 3 files changed, 22 insertions(+), 7 deletions(-) >=20 > diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c > b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c > index 6289834fcb38..9a0138b3b086 100644 > --- a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c > +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c > @@ -29,9 +29,6 @@ >=20 > #include "IntelVTdPmrPei.h" >=20 > -#define TOTAL_DMA_BUFFER_SIZE SIZE_4MB > -#define TOTAL_DMA_BUFFER_SIZE_S3 SIZE_2MB > - > EFI_GUID mVTdInfoGuid =3D { > 0x222f5e30, 0x5cd, 0x49c6, { 0x8a, 0xc, 0x36, 0xd6, 0x58, 0x41, 0xe0, > 0x82 } > }; > @@ -798,9 +795,9 @@ IntelVTdPmrInitialize ( > PeiServicesGetBootMode (&BootMode); >=20 > if (BootMode =3D=3D BOOT_ON_S3_RESUME) { > - DmaBufferInfo->DmaBufferSize =3D TOTAL_DMA_BUFFER_SIZE_S3; > + DmaBufferInfo->DmaBufferSize =3D PcdGet32 > (PcdVTdPeiDmaBufferSizeS3); > } else { > - DmaBufferInfo->DmaBufferSize =3D TOTAL_DMA_BUFFER_SIZE; > + DmaBufferInfo->DmaBufferSize =3D PcdGet32 (PcdVTdPeiDmaBufferSize); > } >=20 > Status =3D PeiServicesNotifyPpi (&mVTdInfoNotifyDesc); > diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.in= f > b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf > index e6d0323acc50..5b688d5cbf9f 100644 > --- a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf > +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf > @@ -4,7 +4,7 @@ > # This driver initializes VTd engine based upon EDKII_VTD_INFO_PPI > # and provide DMA protection in PEI. > # > -# Copyright (c) 2017, Intel Corporation. All rights reserved.
> +# Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
> # This program and the accompanying materials > # are licensed and made available under the terms and conditions of the = BSD > License > # which accompanies this distribution. The full text of the license may= be > found at > @@ -54,6 +54,8 @@ [Ppis] >=20 > [Pcd] > gIntelSiliconPkgTokenSpaceGuid.PcdVTdPolicyPropertyMask ## > CONSUMES > + gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSize ## > CONSUMES > + gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSizeS3 ## > CONSUMES >=20 > [Depex] > gEfiPeiMasterBootModePpiGuid AND > diff --git a/IntelSiliconPkg/IntelSiliconPkg.dec > b/IntelSiliconPkg/IntelSiliconPkg.dec > index a15d3dee392c..c0cf58fa6cb5 100644 > --- a/IntelSiliconPkg/IntelSiliconPkg.dec > +++ b/IntelSiliconPkg/IntelSiliconPkg.dec > @@ -3,7 +3,7 @@ > # > # This package provides common open source Intel silicon modules. > # > -# Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
> +# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
> # This program and the accompanying materials are licensed and made > available under > # the terms and conditions of the BSD License that accompanies this > distribution. > # The full text of the license may be found at > @@ -61,3 +61,19 @@ [PcdsFixedAtBuild, PcdsPatchableInModule, > PcdsDynamic, PcdsDynamicEx] > # @Prompt The policy for VTd driver behavior. >=20 > gIntelSiliconPkgTokenSpaceGuid.PcdVTdPolicyPropertyMask|1|UINT8|0x00000 > 002 >=20 > + ## Declares VTd PEI DMA buffer size.

> + # When this PCD value is referred by platform to calculate the requir= ed > + # memory size for PEI (InstallPeiMemory), the PMR alignment requireme= nt > + # needs be considered to be added with this PCD value for alignment > + # adjustment need by AllocateAlignedPages. > + # @Prompt The VTd PEI DMA buffer size. > + > gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSize|0x00400000|UINT3 > 2|0x00000003 > + > + ## Declares VTd PEI DMA buffer size for S3.

> + # When this PCD value is referred by platform to calculate the requir= ed > + # memory size for PEI S3 (InstallPeiMemory), the PMR alignment > requirement > + # needs be considered to be added with this PCD value for alignment > + # adjustment need by AllocateAlignedPages. > + # @Prompt The VTd PEI DMA buffer size for S3. > + > gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSizeS3|0x00200000|UINT > 32|0x00000004 > + > -- > 2.13.3.windows.1