From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.20; helo=mga02.intel.com; envelope-from=jiewen.yao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6ADD02063D750 for ; Tue, 29 May 2018 09:41:29 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 May 2018 09:41:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,457,1520924400"; d="scan'208";a="43083828" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga007.fm.intel.com with ESMTP; 29 May 2018 09:41:28 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 29 May 2018 09:41:28 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.223]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.70]) with mapi id 14.03.0319.002; Wed, 30 May 2018 00:41:26 +0800 From: "Yao, Jiewen" To: Ard Biesheuvel , "Kinney, Michael D" CC: "edk2-devel@lists.01.org" , "Zeng, Star" , "Yao, Jiewen" Thread-Topic: [edk2] [PATCH v3 3/5] MdePkg/DxeServicesLib: introduce AllocatePeiAccessiblePages routine Thread-Index: AQHT9pHhQTa+ELUdXUSywv7r7IUyjqRFZ98AgAFoPED//4DUAIAAhzHQ//+DagCAAALzgIAAiruQ Date: Tue, 29 May 2018 16:41:26 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503AC169FA@shsmsx102.ccr.corp.intel.com> References: <20180528144024.10809-1-ard.biesheuvel@linaro.org> <20180528144024.10809-4-ard.biesheuvel@linaro.org> <0C09AFA07DD0434D9E2A0C6AEB0483103BB47F36@shsmsx102.ccr.corp.intel.com> <74D8A39837DF1E4DA445A8C0B3885C503AC1685D@shsmsx102.ccr.corp.intel.com> <74D8A39837DF1E4DA445A8C0B3885C503AC1688F@shsmsx102.ccr.corp.intel.com> In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZGUxNzU4N2QtMDVmOS00MTYzLWI4NzEtOTRmNmE5ZmVmYWUzIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiMFRPT0lIY3dsV3J5dm13SEdRMlFVdUlFRldHSURGNktWQklQa0xiOXdtSHFRd25Iemt4c1MyNStzcnFDeEY0QyJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.200.100 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v3 3/5] MdePkg/DxeServicesLib: introduce AllocatePeiAccessiblePages routine X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 29 May 2018 16:41:29 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Thanks. I guess we need it even for X64 PEI/X64 DXE case, because a platform may on= ly allocates 4G even in X64 PEI. BTW, I don't mind if you want to use a separate patch to handle capsule cas= e. Current API is good enough and I do not want to block the check-in. :-) I like this simple solution. Patch series: Reviewed-by: Jiewen.Yao@intel.com Thank you Yao Jiewen > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Ar= d > Biesheuvel > Sent: Tuesday, May 29, 2018 9:20 AM > To: Kinney, Michael D > Cc: edk2-devel@lists.01.org; Yao, Jiewen ; Zeng, St= ar > > Subject: Re: [edk2] [PATCH v3 3/5] MdePkg/DxeServicesLib: introduce > AllocatePeiAccessiblePages routine >=20 > On 29 May 2018 at 18:09, Kinney, Michael D > wrote: > > Jiewen, > > > > I see what you mean. It is not the submitting of > > capsules you are referring to. It is the processing > > if capsules in the PEI phase that depends on some > > things being setup in DXE phase and DXE phase needs > > to know if PEI is in IA32 mode. > > > > So I agree that the commit message could add capsule > > processing to the list of features that can use this > > new service. > > > > The logic in that file is using PcdDxeIplSwitchToLongMode. > > That PCD is TRUE when PEI is IA32 and DXE is X64. But it > > is ignored when PEI and DXE are both X64 and could be > > TRUE or FALSE. Is there a logic issue here with using that > > PCD when PEI and DXE are both X64? > > >=20 > Hi all, >=20 > The reason I disregarded this particular case in my series is that > this code is already specific to X64. However, given the discussion > you are having, I guess the logic of looking at EfiFreeMemoryTop [at > runtime] combined with the various [build time] PCD values could help > to refine this case as well. > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel