From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.20; helo=mga02.intel.com; envelope-from=jiewen.yao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1CD3621B02822 for ; Wed, 12 Sep 2018 22:30:37 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Sep 2018 22:30:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,367,1531810800"; d="scan'208";a="88345678" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga004.fm.intel.com with ESMTP; 12 Sep 2018 22:28:40 -0700 Received: from FMSMSX110.amr.corp.intel.com (10.18.116.10) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 12 Sep 2018 22:28:40 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx110.amr.corp.intel.com (10.18.116.10) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 12 Sep 2018 22:28:40 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.226]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.150]) with mapi id 14.03.0319.002; Thu, 13 Sep 2018 13:28:37 +0800 From: "Yao, Jiewen" To: "Ni, Ruiyu" , "Zeng, Star" , "edk2-devel@lists.01.org" CC: "Chang, Tomson" , "Huang, Jenny" , "Chan, Amy" Thread-Topic: [edk2] [PATCH] IntelSiliconPkg IntelVTdDxe: Optimize when func 0 is not implemented Thread-Index: AQHUSwbpMDCYeCmN20u2plJKHQZTnqTtAo0AgACYxsA= Date: Thu, 13 Sep 2018 05:28:37 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503AD59675@shsmsx102.ccr.corp.intel.com> References: <1536804602-13240-1-git-send-email-star.zeng@intel.com> <7a0c6bc9-eb4d-6e84-8bd1-fac8bab6e1ed@Intel.com> In-Reply-To: <7a0c6bc9-eb4d-6e84-8bd1-fac8bab6e1ed@Intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiOTJiZTdhMWItODJkMy00OTA1LTg2Y2QtZDA5MDZhZTNmODkwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiT0VCVTM3eWdyQ0lxK2hxdTYrMklDMWRGMXVmRXB4aHBEaDlVSEJtOWhCdXRcL2E4TkVob0tQdUc2eTk2ejlGZVQifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] IntelSiliconPkg IntelVTdDxe: Optimize when func 0 is not implemented X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: 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