From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=jiewen.yao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7F87A211350DC for ; Thu, 20 Sep 2018 22:36:51 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Sep 2018 22:36:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,283,1534834800"; d="scan'208";a="92003617" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga001.fm.intel.com with ESMTP; 20 Sep 2018 22:36:41 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 20 Sep 2018 22:36:35 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.70]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.27]) with mapi id 14.03.0319.002; Fri, 21 Sep 2018 13:35:17 +0800 From: "Yao, Jiewen" To: "Gao, Liming" , "edk2-devel@lists.01.org" CC: Laszlo Ersek , "Dong, Eric" Thread-Topic: [PATCH v2] UefiCpuPkg PiSmmCpuDxeSmm: Update SmiEntry function run the same position Thread-Index: AQHUUUX1Q7zPTkSc40uPQ1wsoUGmnKT6NxiQ Date: Fri, 21 Sep 2018 05:35:16 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503AD7D030@shsmsx102.ccr.corp.intel.com> References: <1536729218-8884-1-git-send-email-liming.gao@intel.com> <1537491361-3172-1-git-send-email-liming.gao@intel.com> In-Reply-To: <1537491361-3172-1-git-send-email-liming.gao@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMzE1MzM1NzgtY2FmYS00NWZjLWFlZWYtNzQ2YTcxYzIxODdlIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiNFJHb20wXC9EcitZbHdOT3lZc3oxQzNQV0RJK1EzaHJvY3ZTdlZJYTB1cHgzcG0wTTREMk5zQ20rZWtNR2wwV1wvIn0= x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v2] UefiCpuPkg PiSmmCpuDxeSmm: Update SmiEntry function run the same position X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 21 Sep 2018 05:36:51 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Jiewen.yao@intel.com > -----Original Message----- > From: Gao, Liming > Sent: Friday, September 21, 2018 8:56 AM > To: edk2-devel@lists.01.org > Cc: Laszlo Ersek ; Dong, Eric ; > Yao, Jiewen > Subject: [PATCH v2] UefiCpuPkg PiSmmCpuDxeSmm: Update SmiEntry > function run the same position >=20 > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1191 >=20 > Before commit e21e355e2ca7fefb15b4df7078f995d3fb9c2b89, jmp > _SmiHandler > is commented. And below code, ASM_PFX(CpuSmmDebugEntry) is moved > into rax, > then call it. But, this code doesn't work in XCODE5 tool chain. Because > XCODE5 > doesn't generated the absolute address in the EFI image. So, rax stores t= he > relative address. Once this logic is moved to another place, it will not = work. > ; jmp _SmiHandler ; instruction is not needed > ... > mov rax, ASM_PFX(CpuSmmDebugEntry) > call rax >=20 > Commit e21e355e2ca7fefb15b4df7078f995d3fb9c2b89 is to support > XCODE5. > One tricky way is selected to fix it. Although SmiEntry logic is copied t= o > another place and run, but here jmp _SmiHandler is enabled to jmp the > original > code place, then call ASM_PFX(CpuSmmDebugEntry) with the relative > address. > mov rax, strict qword 0 ; mov rax, _SmiHandler > _SmiHandlerAbsAddr: > jmp rax > ... > call ASM_PFX(CpuSmmDebugEntry) >=20 > Now, BZ 1191 raises the issue that SmiHandler should run in the copied > address, > can't run in the common address. So, jmp _SmiHandler is required to be > removed, > the code is kept to run in copied address. And, the relative address is > requried to be fixed up to the absolute address. The necessary changes > should > not affect the behavior of platforms that already consume > PiSmmCpuDxeSmm. > OVMF SMM boot to shell with VS2017, GCC5 and XCODE5 tool chain has > been verified. > ... > mov rax, strict qword 0 ; call > ASM_PFX(CpuSmmDebugEntry) > CpuSmmDebugEntryAbsAddr: > call rax >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Liming Gao > Cc: Laszlo Ersek > Cc: Eric Dong > Cc: Jiewen Yao > --- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 42 > ++++++++++++++++++++++------- > 1 file changed, 33 insertions(+), 9 deletions(-) >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm > b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm > index 315d0f8..815f95b 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm > @@ -173,9 +173,6 @@ SmiHandlerIdtrAbsAddr: > mov gs, eax > mov ax, [rbx + DSC_SS] > mov ss, eax > - mov rax, strict qword 0 ; mov rax, > _SmiHandler > -_SmiHandlerAbsAddr: > - jmp rax >=20 > _SmiHandler: > mov rbx, [rsp + 0x8] ; rcx <- CpuIndex > @@ -189,13 +186,19 @@ _SmiHandler: > add rsp, -0x20 >=20 > mov rcx, rbx > - call ASM_PFX(CpuSmmDebugEntry) > + mov rax, strict qword 0 ; call > ASM_PFX(CpuSmmDebugEntry) > +CpuSmmDebugEntryAbsAddr: > + call rax >=20 > mov rcx, rbx > - call ASM_PFX(SmiRendezvous) > + mov rax, strict qword 0 ; call > ASM_PFX(SmiRendezvous) > +SmiRendezvousAbsAddr: > + call rax >=20 > mov rcx, rbx > - call ASM_PFX(CpuSmmDebugExit) > + mov rax, strict qword 0 ; call > ASM_PFX(CpuSmmDebugExit) > +CpuSmmDebugExitAbsAddr: > + call rax >=20 > add rsp, 0x20 >=20 > @@ -206,7 +209,8 @@ _SmiHandler: >=20 > add rsp, 0x200 >=20 > - lea rax, [ASM_PFX(mXdSupported)] > + mov rax, strict qword 0 ; lea rax, > [ASM_PFX(mXdSupported)] > +mXdSupportedAbsAddr: > mov al, [rax] > cmp al, 0 > jz .1 > @@ -224,13 +228,33 @@ _SmiHandler: >=20 > ASM_PFX(gcSmiHandlerSize) DW $ - _SmiEntryPoint >=20 > +; > +; Retrieve the address and fill it into mov opcode. > +; > +; It is called in the driver entry point first. > +; It is used to fix up the real address in mov opcode. > +; Then, after the code logic is copied to the different location, > +; the code can also run. > +; > global ASM_PFX(PiSmmCpuSmiEntryFixupAddress) > ASM_PFX(PiSmmCpuSmiEntryFixupAddress): > lea rax, [ASM_PFX(gSmiHandlerIdtr)] > lea rcx, [SmiHandlerIdtrAbsAddr] > mov qword [rcx - 8], rax >=20 > - lea rax, [_SmiHandler] > - lea rcx, [_SmiHandlerAbsAddr] > + lea rax, [ASM_PFX(CpuSmmDebugEntry)] > + lea rcx, [CpuSmmDebugEntryAbsAddr] > + mov qword [rcx - 8], rax > + > + lea rax, [ASM_PFX(SmiRendezvous)] > + lea rcx, [SmiRendezvousAbsAddr] > + mov qword [rcx - 8], rax > + > + lea rax, [ASM_PFX(CpuSmmDebugExit)] > + lea rcx, [CpuSmmDebugExitAbsAddr] > + mov qword [rcx - 8], rax > + > + lea rax, [ASM_PFX(mXdSupported)] > + lea rcx, [mXdSupportedAbsAddr] > mov qword [rcx - 8], rax > ret > -- > 2.10.0.windows.1