From: "Yao, Jiewen" <jiewen.yao@intel.com>
To: "Chiu, Chasel" <chasel.chiu@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Subject: Re: [PATCH v2] IntelFsp2WrapperPkg: Support FSP Dispatch mode
Date: Wed, 7 Nov 2018 02:26:54 +0000 [thread overview]
Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503F3D72B0@shsmsx102.ccr.corp.intel.com> (raw)
In-Reply-To: <20181107022446.13152-1-chasel.chiu@intel.com>
Reviewed-by: Jiewen.yao@intel.com
> -----Original Message-----
> From: Chiu, Chasel
> Sent: Wednesday, November 7, 2018 10:25 AM
> To: edk2-devel@lists.01.org
> Cc: Yao, Jiewen <jiewen.yao@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>
> Subject: [PATCH v2] IntelFsp2WrapperPkg: Support FSP Dispatch mode
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1300
>
> Provides PCD selection for FSP Wrapper to support Dispatch
> mode. Also PcdFspmBaseAddress should support Dynamic for
> recovery scenario (multiple FSP-M binary in flash)
>
> Test: Verified on internal platform and both API and
> DISPATCH modes booted successfully.
>
> Cc: Jiewen Yao <Jiewen.yao@intel.com>
> Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
> ---
> IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 20
> ++++++++++++++++----
> IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 14
> ++++++++++++--
> IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 3 ++-
> IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf | 3 ++-
> IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 13
> +++++++++++--
> 5 files changed, 43 insertions(+), 10 deletions(-)
>
> diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> index 7b7c5f5d86..fa0441ce6c 100644
> --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> @@ -3,7 +3,7 @@
> register TemporaryRamDonePpi to call TempRamExit API, and register
> MemoryDiscoveredPpi
> notify to call FspSiliconInit API.
>
> - Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the
> BSD License
> which accompanies this distribution. The full text of the license may be
> found at
> @@ -65,7 +65,7 @@ PeiFspMemoryInit (
> FspHobListPtr = NULL;
> FspmUpdDataPtr = NULL;
>
> - FspmHeaderPtr = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32
> (PcdFspmBaseAddress));
> + FspmHeaderPtr = (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32
> (PcdFspmBaseAddress));
> DEBUG ((DEBUG_INFO, "FspmHeaderPtr - 0x%x\n", FspmHeaderPtr));
> if (FspmHeaderPtr == NULL) {
> return EFI_DEVICE_ERROR;
> @@ -155,8 +155,20 @@ FspmWrapperInit (
> {
> EFI_STATUS Status;
>
> - Status = PeiFspMemoryInit ();
> - ASSERT_EFI_ERROR (Status);
> + Status = EFI_SUCCESS;
> +
> + if (FixedPcdGet8 (PcdFspModeSelection) == 1) {
> + Status = PeiFspMemoryInit ();
> + ASSERT_EFI_ERROR (Status);
> + } else {
> + PeiServicesInstallFvInfoPpi (
> + NULL,
> + (VOID *)(UINTN) PcdGet32 (PcdFspmBaseAddress),
> + (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32
> (PcdFspmBaseAddress))->FvLength,
> + NULL,
> + NULL
> + );
> + }
>
> return Status;
> }
> diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
> b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
> index 70dac7a414..87dd61e5c5 100644
> --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
> +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
> @@ -3,7 +3,7 @@
> register TemporaryRamDonePpi to call TempRamExit API, and register
> MemoryDiscoveredPpi
> notify to call FspSiliconInit API.
>
> - Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the
> BSD License
> which accompanies this distribution. The full text of the license may be
> found at
> @@ -349,7 +349,17 @@ FspsWrapperPeimEntryPoint (
> {
> DEBUG ((DEBUG_INFO, "FspsWrapperPeimEntryPoint\n"));
>
> - FspsWrapperInit ();
> + if (FixedPcdGet8 (PcdFspModeSelection) == 1) {
> + FspsWrapperInit ();
> + } else {
> + PeiServicesInstallFvInfoPpi (
> + NULL,
> + (VOID *)(UINTN) PcdGet32 (PcdFspsBaseAddress),
> + (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32
> (PcdFspsBaseAddress))->FvLength,
> + NULL,
> + NULL
> + );
> + }
>
> return EFI_SUCCESS;
> }
> diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> index 542356b582..b3776a80f3 100644
> --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> @@ -6,7 +6,7 @@
> # register TemporaryRamDonePpi to call TempRamExit API, and register
> MemoryDiscoveredPpi
> # notify to call FspSiliconInit API.
> #
> -# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
> #
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the
> BSD License
> @@ -61,6 +61,7 @@
> [Pcd]
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ##
> CONSUMES
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress ##
> CONSUMES
> + gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ##
> CONSUMES
>
> [Sources]
> FspmWrapperPeim.c
> diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
> b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
> index cd87a99c40..910286982b 100644
> --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
> +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
> @@ -6,7 +6,7 @@
> # register TemporaryRamDonePpi to call TempRamExit API, and register
> MemoryDiscoveredPpi
> # notify to call FspSiliconInit API.
> #
> -# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
> #
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the
> BSD License
> @@ -68,6 +68,7 @@
> [Pcd]
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ##
> CONSUMES
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress ##
> CONSUMES
> + gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ##
> CONSUMES
>
> [Guids]
> gFspHobGuid ## CONSUMES ## HOB
> diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> index 69df16452d..96f2858fb4 100644
> --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> @@ -71,9 +71,8 @@
> ## Indicate the PEI memory size platform want to report
>
> gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000
> |UINT32|0x40000005
>
> - ## This is the base address of FSP-T/M/S
> + ## This is the base address of FSP-T
>
> gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT3
> 2|0x00000300
> -
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT
> 32|0x00000301
>
> ## This PCD indicates if FSP APIs are skipped from FSP wrapper.<BR><BR>
> # If a bit is set, that means this FSP API is skipped.<BR>
> @@ -93,7 +92,17 @@
> # @Prompt Skip FSP API from FSP wrapper.
>
> gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x4
> 0000009
>
> + ## This PCD decides how Wrapper code utilizes FSP
> + # 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without
> calling FSP API)
> + # 1: API mode (FSP Wrapper will call FSP API)
> + #
> +
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UIN
> T8|0x4000000A
> +
> [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
> + #
> + ## These are the base address of FSP-M/S
> + #
> +
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT
> 32|0x00001000
>
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT
> 32|0x00001001
> #
> # To provide flexibility for platform to pre-allocate FSP UPD buffer
> --
> 2.13.3.windows.1
prev parent reply other threads:[~2018-11-07 2:26 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-07 2:24 [PATCH v2] IntelFsp2WrapperPkg: Support FSP Dispatch mode Chasel, Chiu
2018-11-07 2:26 ` Yao, Jiewen [this message]
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