From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.115; helo=mga14.intel.com; envelope-from=jiewen.yao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E6132211D6801 for ; Fri, 8 Mar 2019 06:13:15 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Mar 2019 06:13:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,456,1544515200"; d="scan'208";a="280946197" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga004.jf.intel.com with ESMTP; 08 Mar 2019 06:13:14 -0800 Received: from shsmsx106.ccr.corp.intel.com (10.239.4.159) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 8 Mar 2019 06:13:14 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.163]) by SHSMSX106.ccr.corp.intel.com ([169.254.10.144]) with mapi id 14.03.0415.000; Fri, 8 Mar 2019 22:13:12 +0800 From: "Yao, Jiewen" To: Laszlo Ersek , Andrew Fish , edk2-devel Thread-Topic: [edk2] UefiCpuPkg CpuDxe GDT init question? Thread-Index: AQHU1TaA3YHFoTLTrEqWLOi5Mqa6G6YA2UgAgADqghA= Date: Fri, 8 Mar 2019 14:13:11 +0000 Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503F55C19B@shsmsx102.ccr.corp.intel.com> References: <96DCE1C9-B02B-4520-A483-F72BBAAAB3B8@apple.com> <480fe32f-032e-0bf8-a561-c41a16213b82@redhat.com> In-Reply-To: <480fe32f-032e-0bf8-a561-c41a16213b82@redhat.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNWIxZTgzMTktNDM1Yy00MWJiLTk5YzgtMzBlM2M1MmE1MjRmIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoib0NTbXdVOHIyS0kzWFM1SWx0SFVcL1VpT3ZKWjUzRERpdHF4dHFCVmF3MkhsZzRxTHUxQnA3NkREVjBWQU92VFoifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: UefiCpuPkg CpuDxe GDT init question? X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 08 Mar 2019 14:13:16 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable I guess the historic reason is that AP and BSP share same GDT before. As su= ch, the GDT need to be below 4G, to let AP switch from real mode to protect= ed mode. We don't get issue, because Runtime memory is in BIN, and most platform all= ocates BIN under 4G. Some thought: 1) I am think we not sure if AP is using same GDT as BSP today. If yes, we = need GDT under 4G, by using MaxAddress. If no, there should be no restricti= on for BSP GDT. The (UINT32) case should be removed for BSP. But we still A= P GDT below 4G, to support wake from INIT-SIPI-SIPI. 2) I am not sure why we need runtime memory. Do we need touch GDT at UEFI r= untime? Thank you Yao Jiewen > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Laszlo Ersek > Sent: Friday, March 8, 2019 12:00 AM > To: Andrew Fish ; edk2-devel > Subject: Re: [edk2] UefiCpuPkg CpuDxe GDT init question? >=20 > Hi Andrew, >=20 > On 03/07/19 23:37, Andrew Fish via edk2-devel wrote: > > I'm trying to understand why gdtPtr.Base is casting to (UINT32)? > > 1) gdtPtr.Base is a a UINTN > > 2) It is legal for AllocateRuntimePool() to return an address > 4GB > > > > It seems like the code should just cast to (UINTN)? > > > > > > > https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/CpuDxe/CpuG > dt.c#L151 >=20 > I think you are right. >=20 > I'm missing the background on this too. I tried to see if any > justification was given in a git commit message, but according to "git > blame", this code dates back to the original addition of the driver, > namely commit a47463f28382 ("Add CPU DXE driver for IA32 & X64 > processor > architectures.", 2009-05-27). The commit message is unhelpful (for 3119 > lines added). >=20 > Thanks > Laszlo >=20 > > > > > > > > VOID > > InitGlobalDescriptorTable ( > > VOID > > ) > > { > > GDT_ENTRIES *gdt; > > IA32_DESCRIPTOR gdtPtr; > > > > // > > // Allocate Runtime Data for the GDT > > // > > gdt =3D AllocateRuntimePool (sizeof (GdtTemplate) + 8); > > ASSERT (gdt !=3D NULL); > > gdt =3D ALIGN_POINTER (gdt, 8); > > > > // > > // Initialize all GDT entries > > // > > CopyMem (gdt, &GdtTemplate, sizeof (GdtTemplate)); > > > > // > > // Write GDT register > > // > > gdtPtr.Base =3D (UINT32)(UINTN)(VOID*) gdt; > > gdtPtr.Limit =3D (UINT16) (sizeof (GdtTemplate) - 1); > > AsmWriteGdtr (&gdtPtr); > > > > Thanks, > > > > Andrew Fish > > _______________________________________________ > > edk2-devel mailing list > > edk2-devel@lists.01.org > > https://lists.01.org/mailman/listinfo/edk2-devel > > >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel