From: "Yao, Jiewen" <jiewen.yao@intel.com>
To: "Chaganty, Rangasai V" <rangasai.v.chaganty@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Ni, Ray" <ray.ni@intel.com>, "Lou, Yun" <yun.lou@intel.com>
Subject: Re: [PATCH V2 1/6] IntelSiliconPkg/Include: Add Intel PciSecurity definition.
Date: Thu, 7 Nov 2019 03:22:43 +0000 [thread overview]
Message-ID: <74D8A39837DF1E4DA445A8C0B3885C503F8416B8@shsmsx102.ccr.corp.intel.com> (raw)
In-Reply-To: <BCAAFC0A0683754C9A88D2C4E3F3A9C7F2F88A09@fmsmsx104.amr.corp.intel.com>
Thanks.
Comments below:
> -----Original Message-----
> From: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
> Sent: Thursday, November 7, 2019 4:00 AM
> To: Yao, Jiewen <jiewen.yao@intel.com>; devel@edk2.groups.io
> Cc: Ni, Ray <ray.ni@intel.com>; Lou, Yun <yun.lou@intel.com>
> Subject: RE: [PATCH V2 1/6] IntelSiliconPkg/Include: Add Intel PciSecurity
> definition.
>
> Hi Jiewen,
> Few comments:
> 1. Can we put a reference to the spec at the file header?
[Jiewen] Agree. Will add in V3.
> 2. Can we group all the macros at the top followed by structure definitions?
[Jiewen] I believe we had better to keep macro close to the data structure definition.
Take UefiSpec.h as example.
EFI_MEMORY_xxx is close to EFI_MEMORY_DESCRIPTOR
EVT_xxx is close to EFI_EVENT_NOTIFY
TPL_xxx is close to EFI_RAISE_TPL
Same example in Acpi.h
We put definition close to the structure, instead of put all definition together on the top.
> 3. Is it possible to add some high level description above the structure definition
> that describes the structure?
[Jiewen] Agree. Will add in V3.
> 4. I see line 80 is commented out. Can we remove that line?
[Jiewen] This is a typical way to define a variable length field.
You may find similar examples in EDKII. Just search [];
C:\home\edkii\edk2\MdePkg\Include\Guid\CapsuleReport.h(84): /// CHAR16 CapsuleFileName[];
C:\home\edkii\edk2\MdePkg\Include\Guid\CapsuleReport.h(92): /// CHAR16 CapsuleTarget[];
C:\home\edkii\edk2\MdePkg\Include\Guid\FmpCapsule.h(46): // UINT64 ItemOffsetList[];
C:\home\edkii\edk2\MdePkg\Include\Guid\ImageAuthentication.h(300): /// CHAR16 Name[];
C:\home\edkii\edk2\MdePkg\Include\Guid\StatusCodeDataTypeId.h(230): // UINT8 ReqRes[];
C:\home\edkii\edk2\MdePkg\Include\Guid\StatusCodeDataTypeId.h(235): // UINT8 AllocRes[];
C:\home\edkii\edk2\MdePkg\Include\Guid\SystemResourceTable.h(114): //EFI_SYSTEM_RESOURCE_ENTRY Entries[];
C:\home\edkii\edk2\MdePkg\Include\Guid\WinCertificate.h(116): /// UINT8 Signature[];
> 5. Please add some description about the change after line 5.
[Jiewen] Line 5 ? It is about license.
Would you please clarify what description is required there?
>
> Thanks,
> Sai
>
> -----Original Message-----
> From: Yao, Jiewen
> Sent: Thursday, October 31, 2019 5:31 AM
> To: devel@edk2.groups.io
> Cc: Ni, Ray <ray.ni@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>; Lou, Yun <yun.lou@intel.com>
> Subject: [PATCH V2 1/6] IntelSiliconPkg/Include: Add Intel PciSecurity definition.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2303
>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
> Cc: Yun Lou <yun.lou@intel.com>
> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
> ---
> Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelPciSecurity.h | 66
> ++++++++++++++++++++
> 1 file changed, 66 insertions(+)
>
> diff --git
> a/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelPciSecurity.h
> b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelPciSecurity.h
> new file mode 100644
> index 0000000000..a8c5483165
> --- /dev/null
> +++ b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelPciSecurity.h
> @@ -0,0 +1,66 @@
> +/** @file
> + Intel PCI security data structure
> +
> +Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
> +SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef __INTEL_PCI_SECURITY_H__
> +#define __INTEL_PCI_SECURITY_H__
> +
> +#pragma pack(1)
> +
> +typedef struct {
> + UINT16 CapId; // 0x23: DVSEC
> + UINT16 CapVersion:4; // 1
> + UINT16 NextOffset:12;
> + UINT16 DvSecVendorId; // 0x8086
> + UINT16 DvSecRevision:4; // 1
> + UINT16 DvSecLength:12;
> + UINT16 DvSecId; // 0x3E: Measure
> +} INTEL_PCI_DIGEST_CAPABILITY_HEADER;
> +
> +#define INTEL_PCI_CAPID_DVSEC 0x23
> +#define INTEL_PCI_DVSEC_VENDORID_INTEL 0x8086
> +#define INTEL_PCI_DVSEC_DVSECID_MEASUREMENT 0x3E
> +
> +typedef union {
> + struct {
> + UINT8 DigestModified:1; // RW1C
> + UINT8 Reserved0:7;
> + } Bits;
> + UINT8 Data;
> +} INTEL_PCI_DIGEST_DATA_MODIFIED;
> +
> +#define INTEL_PCI_DIGEST_MODIFIED BIT0
> +
> +typedef union {
> + struct {
> + UINT8 Digest0Valid:1; // RO
> + UINT8 Digest0Locked:1; // RO
> + UINT8 Digest1Valid:1; // RO
> + UINT8 Digest1Locked:1; // RO
> + UINT8 Reserved1:4;
> + } Bits;
> + UINT8 Data;
> +} INTEL_PCI_DIGEST_DATA_VALID;
> +
> +#define INTEL_PCI_DIGEST_0_VALID BIT0
> +#define INTEL_PCI_DIGEST_0_LOCKED BIT1
> +#define INTEL_PCI_DIGEST_1_VALID BIT2
> +#define INTEL_PCI_DIGEST_1_LOCKED BIT3
> +
> +typedef struct {
> + INTEL_PCI_DIGEST_DATA_MODIFIED Modified; // RW1C
> + INTEL_PCI_DIGEST_DATA_VALID Valid; // RO
> + UINT16 TcgAlgId; // RO
> + UINT8 FirmwareID; // RO
> + UINT8 Reserved;
> +//UINT8 Digest[];
> +} INTEL_PCI_DIGEST_CAPABILITY_STRUCTURE;
> +
> +#pragma pack()
> +
> +#endif
> +
> --
> 2.19.2.windows.1
next prev parent reply other threads:[~2019-11-07 3:22 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-31 12:31 [PATCH V2 0/6] Add Device Security driver Yao, Jiewen
2019-10-31 12:31 ` [PATCH V2 1/6] IntelSiliconPkg/Include: Add Intel PciSecurity definition Yao, Jiewen
2019-11-06 20:00 ` Chaganty, Rangasai V
2019-11-07 3:22 ` Yao, Jiewen [this message]
2019-11-07 4:46 ` Ni, Ray
2019-11-07 7:13 ` Yao, Jiewen
2019-10-31 12:31 ` [PATCH V2 2/6] IntelSiliconPkg/Include: Add Platform Device Security Policy protocol Yao, Jiewen
2019-11-06 21:50 ` Chaganty, Rangasai V
2019-11-07 3:40 ` Yao, Jiewen
2019-11-07 4:55 ` Ni, Ray
2019-11-07 7:45 ` Yao, Jiewen
2019-10-31 12:31 ` [PATCH V2 3/6] IntelSiliconPkg/dec: Add ProtocolGuid definition Yao, Jiewen
2019-11-06 22:09 ` Chaganty, Rangasai V
2019-11-07 6:11 ` Ni, Ray
2019-11-07 7:17 ` Yao, Jiewen
2019-10-31 12:31 ` [PATCH V2 4/6] IntelSiliconPkg/IntelPciDeviceSecurityDxe: Add PciSecurity Yao, Jiewen
2019-11-07 6:38 ` Ni, Ray
2019-11-07 8:41 ` Yao, Jiewen
2019-10-31 12:31 ` [PATCH V2 5/6] IntelSiliconPkg/SamplePlatformDevicePolicyDxe: Add sample policy Yao, Jiewen
2019-11-07 6:55 ` [edk2-devel] " Ni, Ray
2019-11-07 8:42 ` Yao, Jiewen
2019-10-31 12:31 ` [PATCH V2 6/6] IntelSiliconPkg/dsc: Add Device Security component Yao, Jiewen
[not found] ` <15D2BB3E562C773B.23805@groups.io>
2019-11-06 6:48 ` [edk2-devel] [PATCH V2 2/6] IntelSiliconPkg/Include: Add Platform Device Security Policy protocol Yao, Jiewen
[not found] ` <15D2BB3F6D7204CF.23805@groups.io>
2019-11-06 6:48 ` [edk2-devel] [PATCH V2 5/6] IntelSiliconPkg/SamplePlatformDevicePolicyDxe: Add sample policy Yao, Jiewen
[not found] ` <15D2BB3F2A1C2156.31603@groups.io>
2019-11-06 6:48 ` [edk2-devel] [PATCH V2 4/6] IntelSiliconPkg/IntelPciDeviceSecurityDxe: Add PciSecurity Yao, Jiewen
[not found] ` <15D2BB3E9D627794.4494@groups.io>
2019-11-06 6:48 ` [edk2-devel] [PATCH V2 3/6] IntelSiliconPkg/dec: Add ProtocolGuid definition Yao, Jiewen
[not found] ` <15D2BB3E0A913641.22120@groups.io>
2019-11-06 6:48 ` [edk2-devel] [PATCH V2 1/6] IntelSiliconPkg/Include: Add Intel PciSecurity definition Yao, Jiewen
[not found] ` <15D2BB3FAC504840.31603@groups.io>
2019-11-06 6:48 ` [edk2-devel] [PATCH V2 6/6] IntelSiliconPkg/dsc: Add Device Security component Yao, Jiewen
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