From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web12.8933.1649757766566339489 for ; Tue, 12 Apr 2022 03:02:47 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from lichao-PC (unknown [10.40.24.65]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9DxHxNETlVioTogAA--.40077S2; Tue, 12 Apr 2022 18:02:44 +0800 (CST) Date: Tue, 12 Apr 2022 18:02:42 +0800 From: "Chao Li" To: "=?utf-8?Q?=22Chang=2C_Abner_(HPS_SW/FW_Technologist)=22?=" Cc: "=?utf-8?Q?=22devel=40edk2.groups.io=22?=" , Michael D Kinney , Liming Gao , Zhiguang Liu , =?utf-8?Q?=22Baoqi_Zhang=22?= Message-ID: <79D81358-9600-4157-AB3E-66CD8A8FF8DA@getmailspring.com> In-Reply-To: References: Subject: Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 26/33] MdePkg/BaseSynchronizationLib: LoongArch cache related code. X-Mailer: Mailspring MIME-Version: 1.0 X-CM-TRANSID: AQAAf9DxHxNETlVioTogAA--.40077S2 X-Coremail-Antispam: 1UD129KBjvJXoWfGrWUtw1rKry7JFWkJF45trb_yoWDAFy5p3 y7tr9rKa1Igw43Ca48G398GF1DC397Kr4qgFsYyw18uwn8tr1vvrsYqr48KrW8C343ur10 gF1Ygr4fCayDJFJanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUQvb7Iv0xC_KF4lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I 8E87Iv6xkF7I0E14v26rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVAYj202 j2C_Jr0_Gr1l5I8CrVACY4xI64kE6c02F40Ex7xfMc02F40Ew4AK048IF2xKxVW8JVW5Jw Aqx4xG6I80eVA0xI0YY7vIx2IE14AGzxvEb7x7McIj6xIIjxv20xvE14v26r106r15McIj 6I8E87Iv67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l74 80Y4vEI4kI2Ix0rVAqx4xJMxkIecxEwVCm-wCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE 7xkEbVWUJVW8JwCFI7km07C267AKxVW8ZVWrXwC20s026c02F40E14v26r106r1rMI8I3I 0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr41lIxAI cVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcV CF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2jsIE c7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07jrR6wUUUUU= X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAOCF3QvPKUIgABsz Content-Type: multipart/alternative; boundary="62554e42_47b56537_6697" --62554e42_47b56537_6697 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Hi Abner, All of the feedback that you pointed out I will fix it in the next version,= thank you! -- Thanks, Chao ------------------------ On 4=E6=9C=88 8 2022, at 7:02 =E6=99=9A=E4=B8=8A, "Chang, Abner (HPS SW/FW = Technologist)" wrote: > > > > -----Original Message----- > > From: devel@edk2.groups.io On Behalf Of Chao Li > > Sent: Wednesday, February 9, 2022 2:56 PM > > To: devel@edk2.groups.io > > Cc: Michael D Kinney ; Liming Gao > > ; Zhiguang Liu ; Baoq= i > > Zhang > > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 26/33] > > MdePkg/BaseSynchronizationLib: LoongArch cache related code. > > > > Support LoongArch cache related functions. > > > > Cc: Michael D Kinney > > Cc: Liming Gao > > Cc: Zhiguang Liu > > > > Signed-off-by: Chao Li > > Co-authored-by: Baoqi Zhang > > --- > > .../BaseSynchronizationLib.inf | 5 + > > .../LoongArch64/Synchronization.c | 239 ++++++++++++++++++ > > 2 files changed, 244 insertions(+) > > create mode 100644 > > MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c > > > > diff --git > > a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > > b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > > index 83d5b8ed7c..3cf5b6d4b1 100755 > > --- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > > +++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > > @@ -4,6 +4,7 @@ > > # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved. > > # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All ri= ghts > > reserved.
> > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rig= hts > > reserved.
> > # > > # SPDX-License-Identifier: BSD-2-Clause-Patent > > # > > @@ -83,6 +84,10 @@ > > Synchronization.c > > RiscV64/Synchronization.S > > > > +[Sources.LOONGARCH64] > > + Synchronization.c > > + LoongArch64/Synchronization.c > > + > > [Packages] > > MdePkg/MdePkg.dec > > > > diff --git > > a/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c > > b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c > > new file mode 100644 > > index 0000000000..a191a50c81 > > --- /dev/null > > +++ > > b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c > > @@ -0,0 +1,239 @@ > > +/** @file > > + LoongArch synchronization functions. > > + > > + Copyright (c) 2022, Loongson Technology Corporation Limited. All righ= ts > > reserved.
> > + > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +#include > > + > > +/** > > + Performs an atomic compare exchange operation on a 16-bit > > + unsigned integer. > > + > > + Performs an atomic compare exchange operation on the 16-bit > > + unsigned integer specified by Value. If Value is equal to > > + CompareValue, then Value is set to ExchangeValue and > > + CompareValue is returned. If Value is not equal to > > + CompareValue, then Value is returned. The compare exchange > > + operation must be performed using MP safe mechanisms. > > + > > + @param Value A pointer to the 16-bit value for the > > + compare exchange operation. > > + @param CompareValue 16-bit value used in compare operation. > > + @param ExchangeValue 16-bit value used in exchange operation. > > + > > + @return The original *Value before exchange. > I see the modifiers (e.g., IN and/or OUT) are not assigned to @param of a= rguments in the function header across the source files in this patch set. = I know some old source files don't have modifiers neither, however, we shou= ld have those in the new source file according to the coding standard. > > > + > > +**/ > > +UINT16 > > +EFIAPI > > +InternalSyncCompareExchange16 ( > > + IN volatile UINT16 *Value, > > + IN UINT16 CompareValue, > > + IN UINT16 ExchangeValue > > + ) > > +{ > > + UINT32 RetValue, Temp, Shift; > > + UINT64 Mask, LocalCompareValue, LocalExchangeValue; > > + volatile UINT32 *Ptr32; > I can't find the statement in the edk2 C coding standard spec, however as= I can remember each local variable should start at a new line. > > + > > + /* Check that ptr is naturally aligned */ > > + ASSERT(!((UINT64)Value & (sizeof(Value) - 1))); > Please use double back slash for the comment. > > + > > + /* Mask inputs to the correct size. */ > > + Mask =3D (((~0UL) - (1UL << (0)) + 1) & (~0UL >> (64 - 1 - ((sizeof(U= INT16) * 8) > > - 1)))); > > + LocalCompareValue =3D ((UINT64)CompareValue) & Mask; > > + LocalExchangeValue =3D ((UINT64)ExchangeValue) & Mask; > > + > > + /* > > + * Calculate a shift & mask that correspond to the value we wish to > > + * compare & exchange within the naturally aligned 4 byte integer > > + * that includes it. > > + */ > > + Shift =3D (UINT64)Value & 0x3; > > + Shift *=3D 8; /* BITS_PER_BYTE */ > > + LocalCompareValue <<=3D Shift; > > + LocalExchangeValue <<=3D Shift; > > + Mask <<=3D Shift; > > + > > + /* > > + * Calculate a pointer to the naturally aligned 4 byte integer that > > + * includes our byte of interest, and load its value. > > + */ > > + Ptr32 =3D (UINT32 *)((UINT64)Value & ~0x3); > > + > > + __asm__ __volatile__ ( > > + "1: \n" > > + "ll.w %0, %3 \n" > > + "and %1, %0, %4 \n" > > + "bne %1, %5, 2f \n" > > + "or %1, %1, %6 \n" > > + "sc.w %1, %2 \n" > > + "beqz %1, 1b \n" > > + "b 3f \n" > > + "2: \n" > > + "dbar 0 \n" > > + "3: \n" > > + : "=3D&r" (RetValue), "=3D&r" (Temp), "=3D" "ZC" (*Ptr32) > > + : "ZC" (*Ptr32), "Jr" (~Mask), "Jr" (LocalCompareValue), "Jr" > > (LocalExchangeValue) > > + : "memory" > > + ); > > + > > + return (RetValue & Mask) >> Shift; > > +} > > + > > +/** > > + Performs an atomic compare exchange operation on a 32-bit > > + unsigned integer. > > + > > + Performs an atomic compare exchange operation on the 32-bit > > + unsigned integer specified by Value. If Value is equal to > > + CompareValue, then Value is set to ExchangeValue and > > + CompareValue is returned. If Value is not equal to > > + CompareValue, then Value is returned. The compare exchange > > + operation must be performed using MP safe mechanisms. > > + > > + @param Value A pointer to the 32-bit value for the > > + compare exchange operation. > > + @param CompareValue 32-bit value used in compare operation. > > + @param ExchangeValue 32-bit value used in exchange operation. > > + > > + @return The original *Value before exchange. > > + > > +**/ > > +UINT32 > > +EFIAPI > > +InternalSyncCompareExchange32 ( > > + IN volatile UINT32 *Value, > > + IN UINT32 CompareValue, > > + IN UINT32 ExchangeValue > > + ) > > +{ > > + UINT32 RetValue; > > + > > + __asm__ __volatile__ ( > > + "1: \n" > > + "ll.w %0, %2 \n" > > + "bne %0, %3, 2f \n" > > + "move %0, %4 \n" > > + "sc.w %0, %1 \n" > > + "beqz %0, 1b \n" > > + "b 3f \n" > > + "2: \n" > > + "dbar 0 \n" > > + "3: \n" > > + : "=3D&r" (RetValue), "=3D" "ZC" (*Value) > > + : "ZC" (*Value), "Jr" (CompareValue), "Jr" (ExchangeValue) > > + : "memory" > > + ); > > + return RetValue; > > +} > > + > > +/** > > + Performs an atomic compare exchange operation on a 64-bit unsigned > > integer. > > + > > + Performs an atomic compare exchange operation on the 64-bit unsigned > > integer specified > > + by Value. If Value is equal to CompareValue, then Value is set to > > ExchangeValue and > > + CompareValue is returned. If Value is not equal to CompareValue, then > > Value is returned. > > + The compare exchange operation must be performed using MP safe > > mechanisms. > > + > > + @param Value A pointer to the 64-bit value for the compare exchange > > + operation. > > + @param CompareValue 64-bit value used in compare operation. > > + @param ExchangeValue 64-bit value used in exchange operation. > > + > > + @return The original *Value before exchange. > > + > > +**/ > > +UINT64 > > +EFIAPI > > +InternalSyncCompareExchange64 ( > > + IN volatile UINT64 *Value, > > + IN UINT64 CompareValue, > > + IN UINT64 ExchangeValue > > + ) > > +{ > > + UINT64 RetValue; > > + > > + __asm__ __volatile__ ( > > + "1: \n" > > + "ll.d %0, %2 \n" > > + "bne %0, %3, 2f \n" > > + "move %0, %4 \n" > > + "sc.d %0, %1 \n" > > + "beqz %0, 1b \n" > > + "b 3f \n" > > + "2: \n" > > + "dbar 0 \n" > > + "3: \n" > > + : "=3D&r" (RetValue), "=3D" "ZC" (*Value) > > + : "ZC" (*Value), "Jr" (CompareValue), "Jr" (ExchangeValue) > > + : "memory" > > + ); > > + return RetValue; > > +} > > + > > +/** > > + Performs an atomic increment of an 32-bit unsigned integer. > > + > > + Performs an atomic increment of the 32-bit unsigned integer specified= by > > + Value and returns the incremented value. The increment operation must > > be > > + performed using MP safe mechanisms. The state of the return value is = not > > + guaranteed to be MP safe. > > + > > + @param Value A pointer to the 32-bit value to increment. > > + > > + @return The incremented value. > > + > > +**/ > > +UINT32 > > +EFIAPI > > +InternalSyncIncrement ( > > + IN volatile UINT32 *Value > > + ) > > +{ > > + UINT32 Temp =3D *Value; > Value assignment should start at a new line. > Abner > > > + > > + __asm__ __volatile__( > > + "dbar 0 \n" > > + "amadd.w %1, %2, %0 \n" > > + : "+ZB" (*Value), "=3D&r" (Temp) > > + : "r" (1) > > + : "memory" > > + ); > > + return *Value; > > +} > > + > > +/** > > + Performs an atomic decrement of an 32-bit unsigned integer. > > + > > + Performs an atomic decrement of the 32-bit unsigned integer specified= by > > + Value and returns the decrement value. The decrement operation must > > be > > + performed using MP safe mechanisms. The state of the return value is = not > > + guaranteed to be MP safe. > > + > > + @param Value A pointer to the 32-bit value to decrement. > > + > > + @return The decrement value. > > + > > +**/ > > +UINT32 > > +EFIAPI > > +InternalSyncDecrement ( > > + IN volatile UINT32 *Value > > + ) > > +{ > > + UINT32 Temp =3D *Value; > > + > > + __asm__ __volatile__( > > + "dbar 0 \n" > > + "amadd.w %1, %2, %0 \n" > > + : "+ZB" (*Value), "=3D&r" (Temp) > > + : "r" (-1) > > + : "memory" > > + ); > > + return *Value; > > +} > > -- > > 2.27.0 > > > > > > > >=20 > > > --62554e42_47b56537_6697 Content-Type: text/html; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline
Hi Abner,

All of the feedback that you pointed out I wil= l fix it in the next version, thank you!

--
Thanks,
Chao
= ------------------------


On 4=E6=9C=88 8 2022, at 7:02 =E6=99=9A=E4=B8=8A,= "Chang, Abner (HPS SW/FW Technologist)" <abner.chang@hpe.com> wrote:=


> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf O= f Chao Li
> Sent: Wednesday, February 9, 2022 2:56 PM
> To: devel@edk2.groups.io
> Cc: Michael D Kinney <mic= hael.d.kinney@intel.com>; Liming Gao
> <gaoliming@byosof= t.com.cn>; Zhiguang Liu <zhiguang.liu@intel.com>; Baoqi
= > Zhang <zhangbaoqi@loongson.cn>
> Subject: [edk2-dev= el] [staging/LoongArch RESEND PATCH v1 26/33]
> MdePkg/BaseSyn= chronizationLib: LoongArch cache related code.
>
>= ; Support LoongArch cache related functions.
>
> = Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: = Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Zhiguang Liu= <zhiguang.liu@intel.com>
>
> Signed-off-by= : Chao Li <lichao@loongson.cn>
> Co-authored-by: Baoqi Z= hang <zhangbaoqi@loongson.cn>
> ---
> .../B= aseSynchronizationLib.inf | 5 +
> .../LoongArch64/Synchronizat= ion.c | 239 ++++++++++++++++++
> 2 files changed, 244 insertio= ns(+)
> create mode 100644
> MdePkg/Library/BaseS= ynchronizationLib/LoongArch64/Synchronization.c
>
&g= t; diff --git
> a/MdePkg/Library/BaseSynchronizationLib/BaseSy= nchronizationLib.inf
> b/MdePkg/Library/BaseSynchronizationLib= /BaseSynchronizationLib.inf
> index 83d5b8ed7c..3cf5b6d4b1 100= 755
> --- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchron= izationLib.inf
> +++ b/MdePkg/Library/BaseSynchronizationLib/B= aseSynchronizationLib.inf
> @@ -4,6 +4,7 @@
> # C= opyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>=
> # Portions copyright (c) 2008 - 2009, Apple Inc. All rights= reserved.<BR>
> # Copyright (c) 2020, Hewlett Packard E= nterprise Development LP. All rights
> reserved.<BR>
> +# Copyright (c) 2022, Loongson Technology Corporation Limited.= All rights
> reserved.<BR>
> #
&= gt; # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -83,6 +84,10 @@
> Synchronization.c
> = RiscV64/Synchronization.S
>
> +[Sources.LOONGARCH= 64]
> + Synchronization.c
> + LoongArch64/Synchro= nization.c
> +
> [Packages]
> MdePkg= /MdePkg.dec
>
> diff --git
> a/MdePk= g/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
&g= t; b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
> new file mode 100644
> index 0000000000..a191a50c= 81
> --- /dev/null
> +++
> b/MdePkg/= Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
>= @@ -0,0 +1,239 @@
> +/** @file
> + LoongArch syn= chronization functions.
> +
> + Copyright (c) 202= 2, Loongson Technology Corporation Limited. All rights
> reser= ved.<BR>
> +
> + SPDX-License-Identifier: B= SD-2-Clause-Patent
> +
> +**/
> +
> +#include <Library/DebugLib.h>
> +
> +/**
> + Performs an atomic compare exchange operation = on a 16-bit
> + unsigned integer.
> +
&= gt; + Performs an atomic compare exchange operation on the 16-bit
> + unsigned integer specified by Value. If Value is equal to
> + CompareValue, then Value is set to ExchangeValue and
>= + CompareValue is returned. If Value is not equal to
> + Comp= areValue, then Value is returned. The compare exchange
> + ope= ration must be performed using MP safe mechanisms.
> +
> + @param Value A pointer to the 16-bit value for the
>= + compare exchange operation.
> + @param CompareValue 16-bit = value used in compare operation.
> + @param ExchangeValue 16-b= it value used in exchange operation.
> +
> + @ret= urn The original *Value before exchange.
I see the modifiers (e.g= ., IN and/or OUT) are not assigned to @param of arguments in the function h= eader across the source files in this patch set. I know some old source fil= es don't have modifiers neither, however, we should have those in the new s= ource file according to the coding standard.

> +
> +**/
> +UINT16
> +EFIAPI
> +In= ternalSyncCompareExchange16 (
> + IN volatile UINT16 *Value,
> + IN UINT16 CompareValue,
> + IN UINT16 Exchange= Value
> + )
> +{
> + UINT32 RetValue= , Temp, Shift;
> + UINT64 Mask, LocalCompareValue, LocalExchan= geValue;
> + volatile UINT32 *Ptr32;
I can't find th= e statement in the edk2 C coding standard spec, however as I can remember e= ach local variable should start at a new line.
> +
&= gt; + /* Check that ptr is naturally aligned */
> + ASSERT(!((= UINT64)Value & (sizeof(Value) - 1)));
Please use double back = slash for the comment.
> +
> + /* Mask inputs to = the correct size. */
> + Mask =3D (((~0UL) - (1UL << (0)= ) + 1) & (~0UL >> (64 - 1 - ((sizeof(UINT16) * 8)
> = - 1))));
> + LocalCompareValue =3D ((UINT64)CompareValue) &= ; Mask;
> + LocalExchangeValue =3D ((UINT64)ExchangeValue) &am= p; Mask;
> +
> + /*
> + * Calculate = a shift & mask that correspond to the value we wish to
> += * compare & exchange within the naturally aligned 4 byte integer
=
> + * that includes it.
> + */
> + Shift = =3D (UINT64)Value & 0x3;
> + Shift *=3D 8; /* BITS_PER_BYT= E */
> + LocalCompareValue <<=3D Shift;
> += LocalExchangeValue <<=3D Shift;
> + Mask <<=3D Sh= ift;
> +
> + /*
> + * Calculate a po= inter to the naturally aligned 4 byte integer that
> + * inclu= des our byte of interest, and load its value.
> + */
> + Ptr32 =3D (UINT32 *)((UINT64)Value & ~0x3);
> +
> + __asm__ __volatile__ (
> + "1: \n"
&g= t; + "ll.w %0, %3 \n"
> + "and %1, %0, %4 \n"
> += "bne %1, %5, 2f \n"
> + "or %1, %1, %6 \n"
> + "= sc.w %1, %2 \n"
> + "beqz %1, 1b \n"
> + "b 3f \n= "
> + "2: \n"
> + "dbar 0 \n"
> + "3= : \n"
> + : "=3D&r" (RetValue), "=3D&r" (Temp), "=3D" = "ZC" (*Ptr32)
> + : "ZC" (*Ptr32), "Jr" (~Mask), "Jr" (LocalCo= mpareValue), "Jr"
> (LocalExchangeValue)
> + : "m= emory"
> + );
> +
> + return (RetVal= ue & Mask) >> Shift;
> +}
> +
> +/**
> + Performs an atomic compare exchange operation o= n a 32-bit
> + unsigned integer.
> +
&g= t; + Performs an atomic compare exchange operation on the 32-bit
= > + unsigned integer specified by Value. If Value is equal to
= > + CompareValue, then Value is set to ExchangeValue and
> = + CompareValue is returned. If Value is not equal to
> + Compa= reValue, then Value is returned. The compare exchange
> + oper= ation must be performed using MP safe mechanisms.
> +
> + @param Value A pointer to the 32-bit value for the
> = + compare exchange operation.
> + @param CompareValue 32-bit v= alue used in compare operation.
> + @param ExchangeValue 32-bi= t value used in exchange operation.
> +
> + @retu= rn The original *Value before exchange.
> +
> +**= /
> +UINT32
> +EFIAPI
> +InternalSyn= cCompareExchange32 (
> + IN volatile UINT32 *Value,
= > + IN UINT32 CompareValue,
> + IN UINT32 ExchangeValue
> + )
> +{
> + UINT32 RetValue;
> +
> + __asm__ __volatile__ (
> + "1: \n"<= /div>
> + "ll.w %0, %2 \n"
> + "bne %0, %3, 2f \n"
> + "move %0, %4 \n"
> + "sc.w %0, %1 \n"
&= gt; + "beqz %0, 1b \n"
> + "b 3f \n"
> + "2: \n"<= /div>
> + "dbar 0 \n"
> + "3: \n"
> + : "= =3D&r" (RetValue), "=3D" "ZC" (*Value)
> + : "ZC" (*Value)= , "Jr" (CompareValue), "Jr" (ExchangeValue)
> + : "memory"
> + );
> + return RetValue;
> +}
<= div>> +
> +/**
> + Performs an atomic compare = exchange operation on a 64-bit unsigned
> integer.
&= gt; +
> + Performs an atomic compare exchange operation on the= 64-bit unsigned
> integer specified
> + by Value= . If Value is equal to CompareValue, then Value is set to
> Ex= changeValue and
> + CompareValue is returned. If Value is not = equal to CompareValue, then
> Value is returned.
>= ; + The compare exchange operation must be performed using MP safe
> mechanisms.
> +
> + @param Value A pointer= to the 64-bit value for the compare exchange
> + operation.
> + @param CompareValue 64-bit value used in compare operation.=
> + @param ExchangeValue 64-bit value used in exchange operat= ion.
> +
> + @return The original *Value before e= xchange.
> +
> +**/
> +UINT64
<= div>> +EFIAPI
> +InternalSyncCompareExchange64 (
= > + IN volatile UINT64 *Value,
> + IN UINT64 CompareValue,<= /div>
> + IN UINT64 ExchangeValue
> + )
> = +{
> + UINT64 RetValue;
> +
> + __as= m__ __volatile__ (
> + "1: \n"
> + "ll.d %0, %2 \= n"
> + "bne %0, %3, 2f \n"
> + "move %0, %4 \n"
> + "sc.d %0, %1 \n"
> + "beqz %0, 1b \n"
> + "b 3f \n"
> + "2: \n"
> + "dbar 0 \n"
> + "3: \n"
> + : "=3D&r" (RetValue), "=3D" "ZC= " (*Value)
> + : "ZC" (*Value), "Jr" (CompareValue), "Jr" (Exc= hangeValue)
> + : "memory"
> + );
> = + return RetValue;
> +}
> +
> +/**
> + Performs an atomic increment of an 32-bit unsigned integer.=
> +
> + Performs an atomic increment of the 32-b= it unsigned integer specified by
> + Value and returns the inc= remented value. The increment operation must
> be
&g= t; + performed using MP safe mechanisms. The state of the return value is n= ot
> + guaranteed to be MP safe.
> +
&g= t; + @param Value A pointer to the 32-bit value to increment.
>= ; +
> + @return The incremented value.
> +
<= div>> +**/
> +UINT32
> +EFIAPI
> = +InternalSyncIncrement (
> + IN volatile UINT32 *Value
> + )
> +{
> + UINT32 Temp =3D *Value;
Value assignment should start at a new line.
Abner
> +
> + __asm__ __volatile__(
> + "dbar = 0 \n"
> + "amadd.w %1, %2, %0 \n"
> + : "+ZB" (*V= alue), "=3D&r" (Temp)
> + : "r" (1)
> + : "me= mory"
> + );
> + return *Value;
> +}=
> +
> +/**
> + Performs an atomic d= ecrement of an 32-bit unsigned integer.
> +
> + P= erforms an atomic decrement of the 32-bit unsigned integer specified by
> + Value and returns the decrement value. The decrement operatio= n must
> be
> + performed using MP safe mechanism= s. The state of the return value is not
> + guaranteed to be M= P safe.
> +
> + @param Value A pointer to the 32-= bit value to decrement.
> +
> + @return The decre= ment value.
> +
> +**/
> +UINT32
> +EFIAPI
> +InternalSyncDecrement (
> = + IN volatile UINT32 *Value
> + )
> +{
= > + UINT32 Temp =3D *Value;
> +
> + __asm__ __= volatile__(
> + "dbar 0 \n"
> + "amadd.w %1, %2, = %0 \n"
> + : "+ZB" (*Value), "=3D&r" (Temp)
>= + : "r" (-1)
> + : "memory"
> + );
>= ; + return *Value;
> +}
> --
> 2.27.= 0
>
>
>
>
&g= t;
3D"Sent --62554e42_47b56537_6697--