From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=maurice.ma@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BCB3A211093B8 for ; Thu, 7 Jun 2018 08:40:45 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Jun 2018 08:40:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,486,1520924400"; d="scan'208";a="54847240" Received: from orsmsx106.amr.corp.intel.com ([10.22.225.133]) by fmsmga002.fm.intel.com with ESMTP; 07 Jun 2018 08:40:45 -0700 Received: from orsmsx155.amr.corp.intel.com (10.22.240.21) by ORSMSX106.amr.corp.intel.com (10.22.225.133) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 7 Jun 2018 08:40:44 -0700 Received: from orsmsx105.amr.corp.intel.com ([169.254.2.132]) by ORSMSX155.amr.corp.intel.com ([169.254.7.24]) with mapi id 14.03.0319.002; Thu, 7 Jun 2018 08:40:44 -0700 From: "Ma, Maurice" To: "You, Benjamin" CC: "Agyeman, Prince" , "delco@google.com" , "edk2-devel@lists.01.org" Thread-Topic: [PATCH] CorebootModulePkg/CbSupportDxe: Remove SCI_EN setting Thread-Index: AQHT/jhcg84p1AQVHUCRxlCoGdF3w6RU7LhQ Date: Thu, 7 Jun 2018 15:40:43 +0000 Message-ID: <7AAC936950815649B5F88FAE785306C2E4F01428@ORSMSX105.amr.corp.intel.com> References: <20180607081922.12688-1-benjamin.you@intel.com> In-Reply-To: <20180607081922.12688-1-benjamin.you@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMzg0YWM5YjMtOTg4My00NDZkLWI5NzktMDgzMmY0YTdmYWM3IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiTzZcL2xPaTNxb3J2WVZNM3VLOXRKcUlDQ3JTNVwvb1o4VW5Fd2J5T1VJTm5QMTNtdXpQMU9RdVFVQW91WXorc0tXIn0= dlp-product: dlpe-windows dlp-version: 11.0.200.100 dlp-reaction: no-action x-originating-ip: [10.22.254.140] MIME-Version: 1.0 Subject: Re: [PATCH] CorebootModulePkg/CbSupportDxe: Remove SCI_EN setting X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Jun 2018 15:40:45 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable It looks good to me. Reviewed-by: Maurice Ma -----Original Message----- From: You, Benjamin=20 Sent: Thursday, June 7, 2018 1:19 To: edk2-devel@lists.01.org Cc: Ma, Maurice ; Agyeman, Prince ; delco@google.com Subject: [PATCH] CorebootModulePkg/CbSupportDxe: Remove SCI_EN setting Current implemenation sets PM1_CNT.SCI_EN bit at ReadyToBoot event. However, this should not be done because this causes OS to skip triggering = FADT.SMI_CMD, which leads to the functions implemented in the SMI handler b= eing omitted. This issue was identified by Matt Delco . The fix does the following: - The SCI_EN bit setting is removed from CbSupportDxe driver. - Some additional checks are added in CbParseFadtInfo() in CbParseLib.c to output some error message and ASSERT (FALSE) if ALL of the following conditions are met: 1) HARDWARE_REDUCED_ACPI is not set; 2) SMI_CMD field is zero; 3) SCI_EN bit is zero; which indicates the ACPI enabling status is inconsistent: SCI is not enabled but the ACPI table does not provide a means to enable it through FADT->SMI_CMD. This may cause issues in OS. Cc: Maurice Ma Cc: Prince Agyeman Cc: Matt Delco Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Benjamin You --- CorebootModulePkg/CbSupportDxe/CbSupportDxe.c | 39 ------------------= ---- CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf | 1 - CorebootModulePkg/Library/CbParseLib/CbParseLib.c | 28 ++++++++++++++++ .../Library/CbParseLib/CbParseLib.inf | 3 +- 4 files changed, 30 insertions(+), 41 deletions(-) diff --git a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c b/CorebootModule= Pkg/CbSupportDxe/CbSupportDxe.c index c526c9e871..b41c0885f7 100755 --- a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c +++ b/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c @@ -86,31 +86,6 @@ CbReserveResourceInGcd ( return Status; } =20 -/** - Notification function of EVT_GROUP_READY_TO_BOOT event group. - - This is a notification function registered on EVT_GROUP_READY_TO_BOOT ev= ent group. - When the Boot Manager is about to load and execute a boot option, it rec= laims variable - storage if free size is below the threshold. - - @param Event Event whose notification function is being invoked. - @param Context Pointer to the notification function's context. - -**/ -VOID -EFIAPI -OnReadyToBoot ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - // - // Enable SCI - // - IoOr16 (mPmCtrlReg, BIT0); - - DEBUG ((EFI_D_ERROR, "Enable SCI bit at 0x%lx before boot\n", (UINT64)mP= mCtrlReg)); -} =20 /** Main entry for the Coreboot Support DXE module. @@ -130,7 +105,6 @@ CbDxeEntryPoint ( ) { EFI_STATUS Status; - EFI_EVENT ReadyToBootEvent; EFI_HOB_GUID_TYPE *GuidHob; SYSTEM_TABLE_INFO *pSystemTableInfo; ACPI_BOARD_INFO *pAcpiBoardInfo; @@ -197,19 +171,6 @@ CbDxeEntryPoint ( ASSERT_EFI_ERROR (Status); } =20 - // - // Register callback on the ready to boot event - // in order to enable SCI - // - ReadyToBootEvent =3D NULL; - Status =3D EfiCreateEventReadyToBootEx ( - TPL_CALLBACK, - OnReadyToBoot, - NULL, - &ReadyToBootEvent - ); - ASSERT_EFI_ERROR (Status); - return EFI_SUCCESS; } =20 diff --git a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf b/CorebootModu= lePkg/CbSupportDxe/CbSupportDxe.inf index 99245183ea..15b0dac774 100644 --- a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf +++ b/CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf @@ -46,7 +46,6 @@ DebugLib BaseMemoryLib UefiLib - IoLib HobLib =20 [Guids] diff --git a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c b/CorebootMo= dulePkg/Library/CbParseLib/CbParseLib.c index 0909b0f492..cd98a72f01 100644 --- a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c +++ b/CorebootModulePkg/Library/CbParseLib/CbParseLib.c @@ -18,6 +18,7 @@ #include #include #include +#include #include =20 #include @@ -412,6 +413,7 @@ CbParseFadtInfo ( UINTN Entry64Num; UINTN Idx; RETURN_STATUS Status; + BOOLEAN SciEnabled; =20 Rsdp =3D NULL; Status =3D RETURN_SUCCESS; @@ -477,6 +479,32 @@ CbParseFadtInfo ( ASSERT(Fadt->Pm1aEvtBlk !=3D 0); ASSERT(Fadt->Gpe0Blk !=3D 0); =20 + // + // Get SCI_EN value + // + if (Fadt->Pm1CntLen =3D=3D 2) { + SciEnabled =3D (IoRead16 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALS= E; + } else if (Fadt->Pm1CntLen =3D=3D 4) { + SciEnabled =3D (IoRead32 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALS= E; + } else { + // + // Unsupported PM1 CNT Length, revert to 16 bit + // + SciEnabled =3D (IoRead16 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALS= E; + } + + if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) && + (Fadt->SmiCmd =3D=3D 0) && + !SciEnabled) { + // + // The ACPI enabling status is inconsistent: SCI is not enabled = but ACPI + // table does not provide a means to enable it through FADT->Smi= Cmd + // + DEBUG ((DEBUG_ERROR, "ERROR: The ACPI enabling status is inconsi= stent: SCI is not" + " enabled but the ACPI table does not provide a means to enabl= e it through FADT->SmiCmd." + " This may cause issues in OS.\n")); + ASSERT (FALSE); + } return RETURN_SUCCESS; } } diff --git a/CorebootModulePkg/Library/CbParseLib/CbParseLib.inf b/Coreboot= ModulePkg/Library/CbParseLib/CbParseLib.inf index d7146a415b..25b847946c 100644 --- a/CorebootModulePkg/Library/CbParseLib/CbParseLib.inf +++ b/CorebootModulePkg/Library/CbParseLib/CbParseLib.inf @@ -37,7 +37,8 @@ [LibraryClasses] BaseLib BaseMemoryLib - DebugLib + IoLib + DebugLib PcdLib =20 [Pcd] =20 -- 2.14.3.windows.1