From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: zailiang.sun@intel.com) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by groups.io with SMTP; Sun, 30 Jun 2019 21:07:45 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 21:07:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="165692725" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga003.jf.intel.com with ESMTP; 30 Jun 2019 21:07:45 -0700 Received: from fmsmsx155.amr.corp.intel.com (10.18.116.71) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.439.0; Sun, 30 Jun 2019 21:07:44 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX155.amr.corp.intel.com (10.18.116.71) with Microsoft SMTP Server (TLS) id 14.3.439.0; Sun, 30 Jun 2019 21:07:43 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.110]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.22]) with mapi id 14.03.0439.000; Mon, 1 Jul 2019 12:07:41 +0800 From: "Sun, Zailiang" To: "Kinney, Michael D" , "devel@edk2.groups.io" CC: "Qian, Yi" Subject: Re: [edk2-platforms Patch 05/14] Vlv2TbltDevicePkg: Switch to CPU I/O 2 Protocol Thread-Topic: [edk2-platforms Patch 05/14] Vlv2TbltDevicePkg: Switch to CPU I/O 2 Protocol Thread-Index: AQHVL7iO08e6E2kvFUa4yfn771D5Dqa1JZiA Date: Mon, 1 Jul 2019 04:07:41 +0000 Message-ID: <7CB7EF03E15B5D48981329A508747A9850C9052B@SHSMSX104.ccr.corp.intel.com> References: <20190701025553.18596-1-michael.d.kinney@intel.com> <20190701025553.18596-6-michael.d.kinney@intel.com> In-Reply-To: <20190701025553.18596-6-michael.d.kinney@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: zailiang.sun@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-By: Zailiang Sun -----Original Message----- From: Kinney, Michael D=20 Sent: Monday, July 01, 2019 10:56 AM To: devel@edk2.groups.io Cc: Sun, Zailiang ; Qian, Yi Subject: [edk2-platforms Patch 05/14] Vlv2TbltDevicePkg: Switch to CPU I/O = 2 Protocol * Remove unused references to CPU I/O Protocol defined in IntelFrameworkPkg * Convert valid usage of CPU I/O Protocol to the CPU I/O 2 Protocol Cc: Zailiang Sun Cc: Yi Qian Signed-off-by: Michael D Kinney --- .../AcpiPlatform/AcpiPlatform.c | 47 --------------- .../AcpiPlatform/AcpiPlatform.h | 1 - .../AcpiPlatform/AcpiPlatform.inf | 4 +- .../Include/Library/EfiRegTableLib.h | 40 ++----------- .../Library/EfiRegTableLib/EfiRegTableLib.c | 57 ++----------------- .../PciPlatform/PciPlatform.c | 7 +-- .../PciPlatform/PciPlatform.inf | 1 - .../PlatformCpuInfoDxe/PlatformCpuInfoDxe.c | 8 +-- .../PlatformDxe/IchRegTable.c | 8 +-- .../Vlv2TbltDevicePkg/PlatformDxe/Platform.c | 4 +- .../PlatformDxe/PlatformDxe.h | 4 +- .../PlatformDxe/PlatformDxe.inf | 1 - .../PlatformGopPolicy/PlatformGopPolicy.inf | 3 +- .../PlatformInitPei/PchInitPeim.c | 10 +--- .../PlatformSetupDxe/PlatformSetupDxe.inf | 1 - .../PlatformSetupDxe/SetupInfoRecords.c | 1 - .../Vlv2TbltDevicePkg/PlatformSmm/Platform.c | 1 - .../PlatformSmm/PlatformSmm.inf | 1 - .../SmBiosMiscDxe/MiscOemType0x94Function.c | 2 - .../VlvPlatformInitDxe/IgdOpRegion.c | 6 +- .../VlvPlatformInitDxe/VlvPlatformInitDxe.inf | 4 +- 21 files changed, 30 insertions(+), 181 deletions(-) diff --git a/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c b= /Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c index 1f4d575b73..cb280764b3 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c @@ -34,7 +34,6 @@ Abstract: #include #include #include -#include #include #include #include @@ -54,7 +53,6 @@ CHAR16 gACPIOSFRModelStringVariableName[] =3D ACPI_OSF= R_MODEL_STRING_VARIABLE_N CHAR16 gACPIOSFRRefDataBlockVariableName[] =3D ACPI_OSFR_REF_DATA_BLOCK= _VARIABLE_NAME; CHAR16 gACPIOSFRMfgStringVariableName[] =3D ACPI_OSFR_MFG_STRING_VARIAB= LE_NAME; =20 -EFI_CPU_IO_PROTOCOL *mCpuIo; EFI_GLOBAL_NVS_AREA_PROTOCOL mGlobalNvsArea; #ifndef __GNUC__ #pragma optimize("", off) @@ -776,7 +774,6 @@ AcpiPlatformEntryPoint ( EFI_HANDLE Handle; EFI_PS2_POLICY_PROTOCOL *Ps2Policy; EFI_PEI_HOB_POINTERS GuidHob; - UINT8 PortData; EFI_MP_SERVICES_PROTOCOL *MpService; UINTN MaximumNumberOfCPUs; UINTN NumberOfEnabledCPUs; @@ -1132,53 +1129,9 @@ AcpiPlatformEntryPoint ( // // SIO related option. // - Status =3D gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (void **)&= mCpuIo); - ASSERT_EFI_ERROR (Status); - mGlobalNvsArea.Area->WPCN381U =3D GLOBAL_NVS_DEVICE_DISABLE; - mGlobalNvsArea.Area->DockedSioPresent =3D GLOBAL_NVS_DEVICE_DISABLE; =20 - if (mGlobalNvsArea.Area->DockedSioPresent !=3D GLOBAL_NVS_DEVICE_ENABLE)= { - // - // Check ID for SIO WPCN381U. - // - Status =3D mCpuIo->Io.Read ( - mCpuIo, - EfiCpuIoWidthUint8, - WPCN381U_CONFIG_INDEX, - 1, - &PortData - ); - ASSERT_EFI_ERROR (Status); - if (PortData !=3D 0xFF) { - PortData =3D 0x20; - Status =3D mCpuIo->Io.Write ( - mCpuIo, - EfiCpuIoWidthUint8, - WPCN381U_CONFIG_INDEX, - 1, - &PortData - ); - ASSERT_EFI_ERROR (Status); - Status =3D mCpuIo->Io.Read ( - mCpuIo, - EfiCpuIoWidthUint8, - WPCN381U_CONFIG_DATA, - 1, - &PortData - ); - ASSERT_EFI_ERROR (Status); - if ((PortData =3D=3D WPCN381U_CHIP_ID) || (PortData =3D=3D WDCP376_C= HIP_ID)) { - mGlobalNvsArea.Area->WPCN381U =3D GLOBAL_NVS_DEVICE_ENABLE; - mGlobalNvsArea.Area->OnboardCom =3D GLOBAL_NVS_DEVICE_ENABLE; - mGlobalNvsArea.Area->OnboardComCir =3D GLOBAL_NVS_DEVICE_DISABLE; - } - } - } - - - // // Get Ps2 policy to set. Will be use if present. // diff --git a/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.h b= /Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.h index f45590ea24..b27ca661ff 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.h @@ -36,7 +36,6 @@ Abstract: #include #include #include -#include #include #include #include diff --git a/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.inf= b/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.inf index 817ad58a81..ce4db9fa85 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.inf @@ -79,6 +79,4 @@ [Depex] gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid AND gEfiAcpiSupportProtocolGuid AND - gEfiMpServiceProtocolGuid AND - gEfiCpuIoProtocolGuid - + gEfiMpServiceProtocolGuid diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Include/Library/EfiRegTableLi= b.h b/Platform/Intel/Vlv2TbltDevicePkg/Include/Library/EfiRegTableLib.h index 12e44efed0..b295cf46cc 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Include/Library/EfiRegTableLib.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/Include/Library/EfiRegTableLib.h @@ -13,7 +13,7 @@ Abstract: Definitions and macros for building register tables for chipset initialization.. =20 - Components linking this lib must include CpuIo, PciRootBridgeIo, and + Components linking this lib must include PciRootBridgeIo and BootScriptSave protocols in their DPX. =20 =20 @@ -129,10 +129,9 @@ typedef union { entries. =20 No parameter checking is done so the caller must be careful about omitti= ng - values for PciRootBridgeIo or CpuIo parameters. If the regtable does + values for PciRootBridgeIo parameters. If the regtable does not contain any PCI accesses, it is safe to omit the PciRootBridgeIo (su= pply - NULL). If the regtable does not contain any IO or Mem entries, it is sa= fe to - omit the CpuIo (supply NULL). + NULL). =20 The RegTableEntry parameter is not checked, but is required. =20 @@ -146,44 +145,13 @@ typedef union { @param[in] PciRootBridgeIo A pointer to the instance of PciRootBridgeIo= that is used when processing PCI table entries =20 - @param[in] CpuIo A pointer to the instance of CpuIo that is u= sed when processing IO and - MEM table entries - @retval Nothing. =20 **/ VOID ProcessRegTablePci ( EFI_REG_TABLE * RegTableEntry, - EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * PciRootBridgeIo, - EFI_CPU_IO_PROTOCOL * CpuIo - ); - -/** - Processes register table assuming which may contain IO, MEM, and STALL - entries, but must NOT contain any PCI entries. Any PCI entries cause an - ASSERT in a DEBUG build and are skipped in a free build. - - No parameter checking is done. Both RegTableEntry and CpuIo parameters = are - required. - - gBS is assumed to have been defined and is used when processing stalls. - - The function processes each entry sequentially until an OP_TERMINATE_TAB= LE - entry is encountered. - - @param[in] RegTableEntry - A pointer to the register table to process - - @param[in] CpuIo - A pointer to the instance of CpuIo that is used when = processing IO and - MEM table entries - - @retval Nothing. - -**/ -VOID -ProcessRegTableCpu ( - EFI_REG_TABLE * RegTableEntry, - EFI_CPU_IO_PROTOCOL * CpuIo + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * PciRootBridgeIo ); =20 #endif diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/EfiRegTableLib/EfiReg= TableLib.c b/Platform/Intel/Vlv2TbltDevicePkg/Library/EfiRegTableLib/EfiReg= TableLib.c index b7d896d9fd..d698f3ada9 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/EfiRegTableLib/EfiRegTableLi= b.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/Library/EfiRegTableLib/EfiRegTabl +++ eLib.c @@ -1,12 +1,9 @@ /*++ =20 -Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved - = =20 +Copyright (c) 1999 - 2019, Intel Corporation. All rights reserved + SPDX-License-Identifier: BSD-2-Clause-Patent =20 - = =20 - - Module Name: =20 EfiRegTableLib.c @@ -188,10 +185,9 @@ MemReadModifyWrite ( entries. =20 No parameter checking is done so the caller must be careful about omitti= ng - values for PciRootBridgeIo or CpuIo parameters. If the regtable does + values for PciRootBridgeIo parameters. If the regtable does not contain any PCI accesses, it is safe to omit the PciRootBridgeIo (su= pply - NULL). If the regtable does not contain any IO or Mem entries, it is sa= fe to - omit the CpuIo (supply NULL). + NULL). =20 The RegTableEntry parameter is not checked, but is required. =20 @@ -205,17 +201,13 @@ MemReadModifyWrite ( @param PciRootBridgeIo A pointer to the instance of PciRootBridgeIo tha= t is used when processing PCI table entries =20 - @param CpuIo A pointer to the instance of CpuIo that is used = when processing IO and - MEM table entries - @retval Nothing. =20 **/ VOID ProcessRegTablePci ( EFI_REG_TABLE *RegTableEntry, - EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo, - EFI_CPU_IO_PROTOCOL *CpuIo + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo ) { while (OPCODE_BASE (RegTableEntry->Generic.OpCode) !=3D OP_TERMINATE_TAB= LE) { @@ -241,42 +233,3 @@ ProcessRegTablePci ( RegTableEntry++; } } - -/** - Processes register table assuming which may contain IO, MEM, and STALL - entries, but must NOT contain any PCI entries. Any PCI entries cause an - ASSERT in a DEBUG build and are skipped in a free build. - - No parameter checking is done. Both RegTableEntry and CpuIo parameters = are - required. - - gBS is assumed to have been defined and is used when processing stalls. - - The function processes each entry sequentially until an OP_TERMINATE_TAB= LE - entry is encountered. - - @param RegTableEntry A pointer to the register table to process - - @param CpuIo A pointer to the instance of CpuIo that is used = when processing IO and - MEM table entries - - @retval Nothing. - -**/ -VOID -ProcessRegTableCpu ( - EFI_REG_TABLE *RegTableEntry, - EFI_CPU_IO_PROTOCOL *CpuIo - ) -{ - while (OPCODE_BASE (RegTableEntry->Generic.OpCode) !=3D OP_TERMINATE_TAB= LE) { - switch (OPCODE_BASE (RegTableEntry->Generic.OpCode)) { - default: - DEBUG ((EFI_D_ERROR, "RegTable ERROR: Unknown RegTable OpCode (%x)\n= ", OPCODE_BASE (RegTableEntry->Generic.OpCode))); - ASSERT (0); - break; - } - - RegTableEntry++; - } -} diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.c b/P= latform/Intel/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.c index b135e2646c..b1c01afc16 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.c @@ -1,11 +1,9 @@ /** @file =20 - Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
- = =20 + Copyright (c) 2004 - 2019, Intel Corporation. All rights=20 + reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 - = =20 - Module Name: =20 =20 @@ -23,7 +21,6 @@ Abstract: =20 #include #include -#include #include #include #include diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf b= /Platform/Intel/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf index 18012a1d53..685c6103a9 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf @@ -33,7 +33,6 @@ [Guids] =20 [Protocols] gEfiPciPlatformProtocolGuid - gEfiCpuIoProtocolGuid gEfiFirmwareVolume2ProtocolGuid gEfiPciRootBridgeIoProtocolGuid gEfiPciIoProtocolGuid diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformCpuInfoDxe/PlatformCp= uInfoDxe.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformCpuInfoDxe/PlatformCp= uInfoDxe.c index d35a158181..7f3f58e4d1 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformCpuInfoDxe/PlatformCpuInfoDx= e.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformCpuInfoDxe/PlatformCpuInf +++ oDxe.c @@ -1,11 +1,9 @@ /** @file =20 - Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
- = =20 + Copyright (c) 2004 - 2019, Intel Corporation. All rights=20 + reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 - = =20 - Module Name: =20 PlatformCpuInfoDxe.c @@ -41,7 +39,7 @@ PlatformCpuInfoInit ( // // Write the Platform CPU Info to volatile memory for runtime purpos= es. // This must be done in its own driver because SetVariable protocol = is dependent on chipset, - // which is dependent on CpuIo, PlatformInfo, and Metronome. + // which is dependent on CpuIo2, PlatformInfo, and Metronome. // Status =3D gRT->SetVariable( EfiPlatformCpuInfoVariable, diff --git a/Platform/In= tel/Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c b/Platform/Intel/Vlv2TbltDe= vicePkg/PlatformDxe/IchRegTable.c index cac61bffd0..28883c166d 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c @@ -1,11 +1,9 @@ /** @file =20 - Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
- = =20 + Copyright (c) 2004 - 2019, Intel Corporation. All rights=20 + reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 - = =20 - Module Name: =20 =20 @@ -129,6 +127,6 @@ InitializeSubsystemIds ( // // Program the SSVID/SSDID // - ProcessRegTablePci (mSubsystemIdRegs, mPciRootBridgeIo, NULL); + ProcessRegTablePci (mSubsystemIdRegs, mPciRootBridgeIo); =20 } diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/Platform.c b/Plat= form/Intel/Vlv2TbltDevicePkg/PlatformDxe/Platform.c index 89923ffec6..7e083e3933 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/Platform.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/Platform.c @@ -1260,7 +1260,7 @@ UpdateDVMTSetup( =20 UINT8 ReadCmosBank1Byte ( - IN EFI_CPU_IO_PROTOCOL *CpuIo, + IN EFI_CPU_IO2_PROTOCOL *CpuIo, IN UINT8 Index ) { @@ -1273,7 +1273,7 @@ ReadCmosBank1Byte ( =20 VOID WriteCmosBank1Byte ( - IN EFI_CPU_IO_PROTOCOL *CpuIo, + IN EFI_CPU_IO2_PROTOCOL *CpuIo, IN UINT8 Index, IN UINT8 Data ) diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.h b/P= latform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.h index 621fb08274..5c60f823de 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.h @@ -145,13 +145,13 @@ PciBusEvent ( =20 UINT8 ReadCmosBank1Byte ( - IN EFI_CPU_IO_PROTOCOL *CpuIo, + IN EFI_CPU_IO2_PROTOCOL *CpuIo, IN UINT8 Index ); =20 VOID WriteCmosBank1Byte ( - IN EFI_CPU_IO_PROTOCOL *CpuIo, + IN EFI_CPU_IO2_PROTOCOL *CpuIo, IN UINT8 Index, IN UINT8 Data ); diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf b= /Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf index d3f8fa3833..a81f102bac 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf @@ -108,7 +108,6 @@ [Protocols] gEfiWatchdogTimerDriverProtocolGuid gEfiPlatformIdeInitProtocolGuid gEfiGlobalNvsAreaProtocolGuid - gEfiCpuIo2ProtocolGuid gIgdOpRegionProtocolGuid gEdkiiVariableLockProtocolGuid =20 diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformGopPolicy/PlatformGop= Policy.inf b/Platform/Intel/Vlv2TbltDevicePkg/PlatformGopPolicy/PlatformGop= Policy.inf index c00553e224..584355291b 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformGopPolicy/PlatformGopPolicy.= inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformGopPolicy/PlatformGopPoli +++ cy.inf @@ -37,9 +37,8 @@ [Guids] gEfiNormalSetupGuid =20 [Protocols] - gEfiCpuIoProtocolGuid gEfiFirmwareVolume2ProtocolGuid gPlatformGOPPolicyGuid =20 [Depex] - gEfiCpuIoProtocolGuid AND gEfiVariableArchProtocolGuid + gEfiVariableArchProtocolGuid diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PchInitPeim.c= b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PchInitPeim.c index 38b17156f4..4a51a47e36 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PchInitPeim.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PchInitPeim.c @@ -1,12 +1,9 @@ /** @file =20 - Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
- = =20 + Copyright (c) 2004 - 2019, Intel Corporation. All rights=20 + reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 - = =20 - - Module Name: =20 PchInitPeim.c @@ -84,9 +81,6 @@ WriteCmosBank1Byte ( /** Turn off system if needed. =20 - @param PeiServices Pointer to PEI Services - @param CpuIo Pointer to CPU I/O Protocol - @retval None. =20 **/ diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetu= pDxe.inf b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupD= xe.inf index ae100df26d..1afd8a254e 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.in= f +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe +++ .inf @@ -120,7 +120,6 @@ [Protocols] gEfiDiskInfoProtocolGuid ## CONSUMED gEfiMpServiceProtocolGuid gDxePchPlatformPolicyProtocolGuid - gEfiCpuIo2ProtocolGuid gEfiTdtOperationProtocolGuid gEfiSmbiosProtocolGuid ## PROTOCOL CONSUMES =20 diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRec= ords.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords= .c index fb82cdb984..c767021aed 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords +++ .c @@ -23,7 +23,6 @@ Revision History: #include #include = #include -#include #inc= lude #include #include diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSmm/P= latform.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSmm/Platform.c index 14b9250e99..fb9d090ada 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSmm/Platform.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSmm/Platform.c @@ -16,7 +16,6 @@ Abstract: --*/ =20 #include "SmmPlatform.h" -#include =20 =20 // diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSmm/PlatformSmm.inf b= /Platform/Intel/Vlv2TbltDevicePkg/PlatformSmm/PlatformSmm.inf index 3c4f55cf54..73c3b6f2d0 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSmm/PlatformSmm.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSmm/PlatformSmm.inf @@ -56,7 +56,6 @@ [Protocols] gEfiSmmPowerButtonDispatchProtocolGuid gEfiSmmSxDispatchProtocolGuid gEfiSmmVariableProtocolGuid - gEfiCpuIo2ProtocolGuid =20 [Packages] MdePkg/MdePkg.dec diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94= Function.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94= Function.c index 81b66ce9af..2f25ab802b 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Functio= n.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Func +++ tion.c @@ -19,7 +19,6 @@ Abstract: #include "MiscSubclassDriver.h" #include #include -#include #include #include #include @@ -28,7 +27,6 @@ Abstract: #include #include = #include -#include #inc= lude =20 #include diff --git a/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/IgdOpRegio= n.c b/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/IgdOpRegion.c index 8fe1482106..99db5490b6 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/IgdOpRegion.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/IgdOpRegion.c @@ -41,7 +41,7 @@ Abstract: #include #include #include -#inc= lude +#include #include #include #include @@ -631,7 +631,7 @@ IgdOpRegionInit ( EFI_STATUS Status; EFI_GLOBAL_NVS_AREA_PROTOCOL *GlobalNvsArea; UINT32 DwordData; - EFI_CPU_IO_PROTOCOL *CpuIo; + EFI_CPU_IO2_PROTOCOL *CpuIo; UINT16 Data16; UINT16 AcpiBase; VOID *gConOutNotifyReg; @@ -879,7 +879,7 @@ IgdOpRegionInit ( // Find the CPU I/O Protocol. ASSERT if not found. // Status =3D gBS->LocateProtocol ( - &gEfiCpuIoProtocolGuid, + &gEfiCpuIo2ProtocolGuid, NULL, (void **)&CpuIo ); diff --git a/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatfor= mInitDxe.inf b/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatf= ormInitDxe.inf index 1e86adadb3..fe81a6e3bd 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDx= e.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformIni +++ tDxe.inf @@ -59,12 +59,12 @@ [Protocols] gEfiGlobalNvsAreaProtocolGuid gEfiPciIoProtocolGuid gEfiFirmwareVolume2ProtocolGuid - gEfiCpuIoProtocolGuid + gEfiCpuIo2ProtocolGuid =20 [Depex] gDxeVlvPlatformPolicyGuid AND gEfiPciRootBridgeIoProtocolGuid AND - gEfiCpuIoProtocolGuid AND + gEfiCpuIo2ProtocolGuid AND gEfiDataHubProtocolGuid AND gEfiGlobalNvsAreaProtocolGuid AND gEfiFirmwareVolume2ProtocolGuid AND -- 2.21.0.windows.1