From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.136, mailfrom: zailiang.sun@intel.com) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by groups.io with SMTP; Sun, 30 Jun 2019 21:08:13 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 21:08:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="157168440" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga008.jf.intel.com with ESMTP; 30 Jun 2019 21:08:12 -0700 Received: from fmsmsx606.amr.corp.intel.com (10.18.126.86) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Sun, 30 Jun 2019 21:08:12 -0700 Received: from fmsmsx606.amr.corp.intel.com (10.18.126.86) by fmsmsx606.amr.corp.intel.com (10.18.126.86) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Sun, 30 Jun 2019 21:08:12 -0700 Received: from shsmsx105.ccr.corp.intel.com (10.239.4.158) by fmsmsx606.amr.corp.intel.com (10.18.126.86) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.1713.5 via Frontend Transport; Sun, 30 Jun 2019 21:08:11 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.110]) by SHSMSX105.ccr.corp.intel.com ([169.254.11.232]) with mapi id 14.03.0439.000; Mon, 1 Jul 2019 12:08:10 +0800 From: "Sun, Zailiang" To: "Kinney, Michael D" , "devel@edk2.groups.io" CC: "Qian, Yi" Subject: Re: [edk2-platforms Patch 09/14] Vlv2TbltDevicePkg: Use PI Spec SMBUS2 PPI Thread-Topic: [edk2-platforms Patch 09/14] Vlv2TbltDevicePkg: Use PI Spec SMBUS2 PPI Thread-Index: AQHVL7iZ8ebPYmI9S0OqziwTcpaoeaa1JbrA Date: Mon, 1 Jul 2019 04:08:09 +0000 Message-ID: <7CB7EF03E15B5D48981329A508747A9850C90569@SHSMSX104.ccr.corp.intel.com> References: <20190701025553.18596-1-michael.d.kinney@intel.com> <20190701025553.18596-10-michael.d.kinney@intel.com> In-Reply-To: <20190701025553.18596-10-michael.d.kinney@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: zailiang.sun@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-By: Zailiang Sun -----Original Message----- From: Kinney, Michael D=20 Sent: Monday, July 01, 2019 10:56 AM To: devel@edk2.groups.io Cc: Sun, Zailiang ; Qian, Yi Subject: [edk2-platforms Patch 09/14] Vlv2TbltDevicePkg: Use PI Spec SMBUS2= PPI * Switch from Intel Framework SMBUS PPI to the PI Spec SMBUS2 PPI. * Remove unused SmbusLib. Use SmbusLibNull instead. Cc: Zailiang Sun Cc: Yi Qian Signed-off-by: Michael D Kinney --- .../Include/Guid/PlatformInfo.h | 9 +- .../BoardClkGens/BoardClkGens.c | 23 +- .../BoardClkGens/BoardClkGens.h | 8 +- .../MultiPlatformLib/BoardGpios/BoardGpios.c | 12 +- .../MultiPlatformLib/BoardGpios/BoardGpios.h | 7 +- .../MultiPlatformLib/MultiPlatformLib.h | 4 - .../MultiPlatformLib/MultiPlatformLib.inf | 2 +- .../Library/SmbusLib/CommonHeader.h | 26 - .../Library/SmbusLib/SmbusLib.c | 873 ------------------ .../Library/SmbusLib/SmbusLib.inf | 46 - .../Vlv2TbltDevicePkg/PlatformInitPei/Dimm.c | 319 ------- .../PlatformInitPei/PlatformEarlyInit.h | 10 +- .../PlatformPei/CommonHeader.h | 1 - .../PlatformPei/PlatformPei.inf | 1 - .../Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc | 2 +- .../Vlv2TbltDevicePkg/PlatformPkgIA32.dsc | 2 +- .../Vlv2TbltDevicePkg/PlatformPkgX64.dsc | 2 +- 17 files changed, 24 insertions(+), 1323 deletions(-) delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/Commo= nHeader.h delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/Smbus= Lib.c delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/Smbus= Lib.inf delete mode 100644 Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/Dimm.c diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformInfo.h b= /Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformInfo.h index cac31e2a40..afd4b6f4f0 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformInfo.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformInfo.h @@ -1,13 +1,9 @@ /*++ =20 - Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
- = =20 + Copyright (c) 2004 - 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 - = =20 - - - Module Name: =20 PlatformInfo.h @@ -27,7 +23,6 @@ Abstract: #include #include #include -#include #include #endif =20 diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/Boar= dClkGens/BoardClkGens.c b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPla= tformLib/BoardClkGens/BoardClkGens.c index 919032c2df..4356f7b366 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGen= s/BoardClkGens.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGen= s/BoardClkGens.c @@ -1,12 +1,10 @@ /** @file Clock generator setting for multiplatform. =20 - Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.
- = =20 + Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 - = =20 - **/ =20 #include @@ -44,7 +42,7 @@ CLOCK_GENERATOR_DETAILS mSupportedClockGeneratorTable[]= =3D EFI_STATUS ConfigureClockGenerator ( IN EFI_PEI_SERVICES **PeiServices, - IN EFI_PEI_SMBUS_PPI *SmbusPpi, + IN EFI_PEI_SMBUS2_PPI *SmbusPpi, IN CLOCK_GENERATOR_TYPE ClockType, IN UINT8 ClockAddress, IN UINTN ConfigurationTableLength, @@ -76,7 +74,6 @@ ConfigureClockGenerator ( Length =3D sizeof (Buffer); Command =3D 0; Status =3D SmbusPpi->Execute ( - PeiServices, SmbusPpi, SlaveAddress, Command, @@ -116,7 +113,6 @@ ConfigureClockGenerator ( Buffer[30] =3D 0x00; =20 Status =3D SmbusPpi->Execute ( - PeiServices, SmbusPpi, SlaveAddress, Command, @@ -127,7 +123,6 @@ ConfigureClockGenerator ( ); #else Status =3D SmbusPpi->Execute ( - PeiServices, SmbusPpi, SlaveAddress, Command, @@ -142,7 +137,6 @@ ConfigureClockGenerator ( Command =3D 4; Length =3D 1; Status =3D SmbusPpi->Execute ( - PeiServices, SmbusPpi, SlaveAddress, Command, @@ -164,7 +158,6 @@ ConfigureClockGenerator ( Length =3D sizeof (Buffer); Command =3D 0; Status =3D SmbusPpi->Execute ( - PeiServices, SmbusPpi, SlaveAddress, Command, @@ -201,7 +194,7 @@ ConfigureClockGenerator ( UINT8 ReadClockGeneratorID ( IN EFI_PEI_SERVICES **PeiServices, - IN EFI_PEI_SMBUS_PPI *SmbusPpi, + IN EFI_PEI_SMBUS2_PPI *SmbusPpi, IN UINT8 ClockAddress ) { @@ -217,7 +210,6 @@ ReadClockGeneratorID ( Length =3D sizeof (Buffer); Command =3D 0; SmbusPpi->Execute ( - PeiServices, SmbusPpi, SlaveAddress, Command, @@ -289,7 +281,7 @@ ConfigurePlatformClocks ( // Status =3D (**PeiServices).LocatePpi ( (CONST EFI_PEI_SERVICES **) PeiServices, - &gEfiPeiSmbusPpiGuid, + &gEfiPeiSmbus2PpiGuid, 0, NULL, &SmbusPpi @@ -300,8 +292,7 @@ ConfigurePlatformClocks ( SlaveAddress.SmbusDeviceAddress =3D ClockAddress >> 1; Length =3D 1; Command =3D 0x87; //Control Register 7 Vendor ID Check - Status =3D ((EFI_PEI_SMBUS_PPI *) SmbusPpi)->Execute ( - PeiServices, + Status =3D ((EFI_PEI_SMBUS2_PPI *) SmbusPpi)->Execute ( SmbusPpi, SlaveAddress, Command, @@ -405,7 +396,7 @@ ConfigurePlatformClocks ( static EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList[] =3D { { EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK| EFI_PEI_PPI_DESCRIPTOR_TERMINA= TE_LIST, - &gEfiPeiSmbusPpiGuid, + &gEfiPeiSmbus2PpiGuid, ConfigurePlatformClocks } }; diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/Boar= dClkGens/BoardClkGens.h b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPla= tformLib/BoardClkGens/BoardClkGens.h index e153933d72..fe0ed24af7 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGen= s/BoardClkGens.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGen= s/BoardClkGens.h @@ -3,11 +3,10 @@ =20 This file includes package header files, library classes. =20 - Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.
- = =20 + Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 - = =20 **/ =20 #ifndef _BOARD_CLK_GEN_H_ @@ -17,8 +16,7 @@ #include #include #include -#include -#include +#include #include #include =20 diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/Boar= dGpios/BoardGpios.c b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatfor= mLib/BoardGpios/BoardGpios.c index 5790d045fc..a9e2c8c060 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/= BoardGpios.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/= BoardGpios.c @@ -1,12 +1,10 @@ /** @file Gpio setting for multiplatform.. =20 - Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.
- = =20 + Copyright (c) 2013 - 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 - = =20 - **/ =20 #include @@ -25,8 +23,6 @@ //AlpineValley platform code end // =20 -EFI_GUID gPeiSmbusPpiGuid =3D EFI_PEI_SMBUS_PPI_GUID; - /** @param None =20 @@ -66,7 +62,7 @@ ConfigurePlatformSysCtrlGpio ( =20 Status =3D (**PeiServices).LocatePpi ( (const EFI_PEI_SERVICES **)PeiServices, - &gPeiSmbusPpiGuid, + &gEfiPeiSmbus2PpiGuid, 0, NULL, (void **)&SmbusPpi @@ -92,7 +88,7 @@ ConfigurePlatformSysCtrlGpio ( static EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList[] =3D { { EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK| EFI_PEI_PPI_DESCRIPTOR_TERMINA= TE_LIST, - &gEfiPeiSmbusPpiGuid, + &gEfiPeiSmbus2PpiGuid, ConfigurePlatformSysCtrlGpio } }; diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/Boar= dGpios/BoardGpios.h b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatfor= mLib/BoardGpios/BoardGpios.h index 0e19819b22..594616d63a 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/= BoardGpios.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/= BoardGpios.h @@ -3,11 +3,10 @@ =20 This file includes package header files, library classes. =20 - Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.
- = =20 + Copyright (c) 2013 - 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 - = =20 **/ =20 #ifndef _BOARDGPIOS_H_ @@ -20,7 +19,7 @@ #include #include #include -#include +#include #include #include =20 diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/Mult= iPlatformLib.h b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/= MultiPlatformLib.h index 3fa9f7b129..13097fbc74 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/MultiPlatfo= rmLib.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/MultiPlatfo= rmLib.h @@ -26,7 +26,6 @@ =20 #include #include -#include =20 #include "PlatformBaseAddresses.h" #include "PchAccess.h" @@ -37,7 +36,6 @@ #include #include #include -#include #include #include #include @@ -50,7 +48,6 @@ #include #include #include -#include #include #include #include @@ -58,7 +55,6 @@ #include #include #include -#include #include #include #include diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/Mult= iPlatformLib.inf b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLi= b/MultiPlatformLib.inf index a4942a097c..7a084bea3c 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/MultiPlatfo= rmLib.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/MultiPlatfo= rmLib.inf @@ -54,7 +54,6 @@ [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec Vlv2TbltDevicePkg/PlatformPkg.dec - IntelFrameworkPkg/IntelFrameworkPkg.dec Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec =20 [LibraryClasses] @@ -64,6 +63,7 @@ [LibraryClasses] =20 [Ppis] gEfiPeiReadOnlyVariable2PpiGuid + gEfiPeiSmbus2PpiGuid =20 [Pcd.common] gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/CommonHeader= .h b/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/CommonHeader.h deleted file mode 100644 index d34dd942d3..0000000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/CommonHeader.h +++ /dev/null @@ -1,26 +0,0 @@ -/**@file - Common header file shared by all source files. - - This file includes package header files, library classes. - - Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.
- = =20 - SPDX-License-Identifier: BSD-2-Clause-Patent - - = =20 -**/ - -#ifndef __COMMON_HEADER_H_ -#define __COMMON_HEADER_H_ - - -#include -#include - -#include -#include -#include -#include -#include - -#endif diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.c b= /Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.c deleted file mode 100644 index 4052724812..0000000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.c +++ /dev/null @@ -1,873 +0,0 @@ -/** @file - Intel ICH9 SMBUS library implementation built upon I/O library. - - Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.
- = =20 - SPDX-License-Identifier: BSD-2-Clause-Patent - - = =20 - -**/ - -#include "CommonHeader.h" - -/** - Gets Io port base address of Smbus Host Controller. - - This internal function depends on a feature flag named PcdIchSmbusFixedI= oPortBaseAddress - to retrieve Smbus Io port base. If that feature flag is true, it will ge= t Smbus Io port base - address from a preset Pcd entry named PcdIchSmbusIoPortBaseAddress; othe= rwise, it will always - read Pci configuration space to get that value in each Smbus bus transac= tion. - - @return The Io port base address of Smbus host controller. - -**/ -UINTN -InternalGetSmbusIoPortBaseAddress ( - VOID - ) -{ - UINTN IoPortBaseAddress; - - IoPortBaseAddress =3D (UINTN) MmioRead32 (MmPciAddress (0, DEFAULT_PCI_B= US_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_SMBUS, PCI_FUNCTION_NUMBER_PCH_SMBUS, = R_PCH_SMBUS_BASE)) & B_PCH_SMBUS_BASE_BAR; - - // - // Make sure that the IO port base address has been properly set. - // - ASSERT (IoPortBaseAddress !=3D 0); - - return IoPortBaseAddress; -} - -/** - Acquires the ownership of SMBUS. - - This internal function reads the host state register. - If the SMBUS is not available, RETURN_TIMEOUT is returned; - Otherwise, it performs some basic initializations and returns - RETURN_SUCCESS. - - @param IoPortBaseAddress The Io port base address of Smbus Host control= ler. - - @retval RETURN_SUCCESS The SMBUS command was executed successfully. - @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS c= ommand. - -**/ -RETURN_STATUS -InternalSmBusAcquire ( - UINTN IoPortBaseAddress - ) -{ - UINT8 HostStatus; - - HostStatus =3D IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS); - if ((HostStatus & B_PCH_SMBUS_IUS) !=3D 0) { - return RETURN_TIMEOUT; - } else if ((HostStatus & B_PCH_SMBUS_HBSY) !=3D 0) { - // - // Clear host status register and exit. - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS, B_PCH_SMBUS_HSTS_ALL); - return RETURN_TIMEOUT; - } - // - // Clear out any odd status information (Will Not Clear In Use). - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS, HostStatus); - - return RETURN_SUCCESS; -} - -/** - Starts the SMBUS transaction and waits until the end. - - This internal function start the SMBUS transaction and waits until the t= ransaction - of SMBUS is over by polling the INTR bit of Host status register. - If the SMBUS is not available, RETURN_TIMEOUT is returned; - Otherwise, it performs some basic initializations and returns - RETURN_SUCCESS. - - @param IoPortBaseAddress The Io port base address of Smbus Host contr= oller. - @param HostControl The Host control command to start SMBUS tran= saction. - - @retval RETURN_SUCCESS The SMBUS command was executed successfully. - @retval RETURN_CRC_ERROR The checksum is not correct (PEC is incorrec= t). - @retval RETURN_DEVICE_ERROR The request was not completed because a fail= ure reflected - in the Host Status Register bit. Device err= ors are - a result of a transaction collision, illegal= command field, - unclaimed cycle (host initiated), or bus err= ors (collisions). - -**/ -RETURN_STATUS -InternalSmBusStart ( - IN UINTN IoPortBaseAddress, - IN UINT8 HostControl - ) -{ - UINT8 HostStatus; - UINT8 AuxiliaryStatus; - - // - // Set Host Control Register (Initiate Operation, Interrupt disabled). - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCTL, (UINT8)(HostControl + B_= PCH_SMBUS_START)); - - do { - // - // Poll INTR bit of Host Status Register. - // - HostStatus =3D IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS); - } while ((HostStatus & (B_PCH_SMBUS_INTR | B_PCH_SMBUS_ERRORS | B_PCH_SM= BUS_BYTE_DONE_STS)) =3D=3D 0); - - if ((HostStatus & B_PCH_SMBUS_ERRORS) =3D=3D 0) { - return RETURN_SUCCESS; - } - - // - // Clear error bits of Host Status Register. - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS, B_PCH_SMBUS_ERRORS); - - // - // Read Auxiliary Status Register to judge CRC error. - // - AuxiliaryStatus =3D IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_AUXS); - if ((AuxiliaryStatus & B_PCH_SMBUS_CRCE) !=3D 0) { - return RETURN_CRC_ERROR; - } - - return RETURN_DEVICE_ERROR; -} - -/** - Executes an SMBUS quick, byte or word command. - - This internal function executes an SMBUS quick, byte or word commond. - If Status is not NULL, then the status of the executed command is return= ed in Status. - - @param HostControl The value of Host Control Register to set. - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param Value The byte/word write to the SMBUS. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - - @return The byte/word read from the SMBUS. - -**/ -UINT16 -InternalSmBusNonBlock ( - IN UINT8 HostControl, - IN UINTN SmBusAddress, - IN UINT16 Value, - OUT RETURN_STATUS *Status - ) -{ - RETURN_STATUS ReturnStatus; - UINTN IoPortBaseAddress; - UINT8 AuxiliaryControl; - - IoPortBaseAddress =3D InternalGetSmbusIoPortBaseAddress (); - - // - // Try to acquire the ownership of ICH SMBUS. - // - ReturnStatus =3D InternalSmBusAcquire (IoPortBaseAddress); - if (RETURN_ERROR (ReturnStatus)) { - goto Done; - } - - // - // Set the appropriate Host Control Register and auxiliary Control Regis= ter. - // - AuxiliaryControl =3D 0; - if (SMBUS_LIB_PEC (SmBusAddress)) { - AuxiliaryControl |=3D B_PCH_SMBUS_AAC; - HostControl |=3D B_PCH_SMBUS_PEC_EN; - } - - // - // Set Host Command Register. - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAN= D (SmBusAddress)); - - // - // Write value to Host Data 0 and Host Data 1 Registers. - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD0, (UINT8) Value); - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD1, (UINT8) (Value >> 8)); - - // - // Set Auxiliary Control Register. - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_AUXC, AuxiliaryControl); - - // - // Set SMBUS slave address for the device to send/receive from. - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_TSA, (UINT8) SmBusAddress); - - // - // Start the SMBUS transaction and wait for the end. - // - ReturnStatus =3D InternalSmBusStart (IoPortBaseAddress, HostControl); - - // - // Read value from Host Data 0 and Host Data 1 Registers. - // - Value =3D (UINT16)(IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HD1) << 8); - Value =3D (UINT16)(Value | IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HD0)= ); - - // - // Clear Host Status Register and Auxiliary Status Register. - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS, B_PCH_SMBUS_HSTS_ALL); - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_AUXS, B_PCH_SMBUS_CRCE); - -Done: - if (Status !=3D NULL) { - *Status =3D ReturnStatus; - } - - return Value; -} - -/** - Executes an SMBUS quick read command. - - Executes an SMBUS quick read command on the SMBUS device specified by Sm= BusAddress. - Only the SMBUS slave address field of SmBusAddress is required. - If Status is not NULL, then the status of the executed command is return= ed in Status. - If PEC is set in SmBusAddress, then ASSERT(). - If Command in SmBusAddress is not zero, then ASSERT(). - If Length in SmBusAddress is not zero, then ASSERT(). - If any reserved bits of SmBusAddress are set, then ASSERT(). - - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - -**/ -VOID -EFIAPI -SmBusQuickRead ( - IN UINTN SmBusAddress, - OUT RETURN_STATUS *Status OPTIONAL - ) -{ - ASSERT (!SMBUS_LIB_PEC (SmBusAddress)); - ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) =3D=3D 0); - - InternalSmBusNonBlock ( - V_PCH_SMBUS_SMB_CMD_QUICK, - SmBusAddress | B_PCH_SMBUS_RW_SEL_READ, - 0, - Status - ); -} - -/** - Executes an SMBUS quick write command. - - Executes an SMBUS quick write command on the SMBUS device specified by S= mBusAddress. - Only the SMBUS slave address field of SmBusAddress is required. - If Status is not NULL, then the status of the executed command is return= ed in Status. - If PEC is set in SmBusAddress, then ASSERT(). - If Command in SmBusAddress is not zero, then ASSERT(). - If Length in SmBusAddress is not zero, then ASSERT(). - If any reserved bits of SmBusAddress are set, then ASSERT(). - - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - -**/ -VOID -EFIAPI -SmBusQuickWrite ( - IN UINTN SmBusAddress, - OUT RETURN_STATUS *Status OPTIONAL - ) -{ - ASSERT (!SMBUS_LIB_PEC (SmBusAddress)); - ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) =3D=3D 0); - - InternalSmBusNonBlock ( - V_PCH_SMBUS_SMB_CMD_QUICK, - SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE, - 0, - Status - ); -} - -/** - Executes an SMBUS receive byte command. - - Executes an SMBUS receive byte command on the SMBUS device specified by = SmBusAddress. - Only the SMBUS slave address field of SmBusAddress is required. - The byte received from the SMBUS is returned. - If Status is not NULL, then the status of the executed command is return= ed in Status. - If Command in SmBusAddress is not zero, then ASSERT(). - If Length in SmBusAddress is not zero, then ASSERT(). - If any reserved bits of SmBusAddress are set, then ASSERT(). - - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - - @return The byte received from the SMBUS. - -**/ -UINT8 -EFIAPI -SmBusReceiveByte ( - IN UINTN SmBusAddress, - OUT RETURN_STATUS *Status OPTIONAL - ) -{ - UINT8 ValueReturn =3D 0; - - ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) =3D=3D 0); - - ValueReturn =3D (UINT8) InternalSmBusNonBlock ( - V_PCH_SMBUS_SMB_CMD_BYTE, - SmBusAddress | B_PCH_SMBUS_RW_SEL_READ, - 0, - Status - ); - return ValueReturn; - - } - -/** - Executes an SMBUS send byte command. - - Executes an SMBUS send byte command on the SMBUS device specified by SmB= usAddress. - The byte specified by Value is sent. - Only the SMBUS slave address field of SmBusAddress is required. Value i= s returned. - If Status is not NULL, then the status of the executed command is return= ed in Status. - If Command in SmBusAddress is not zero, then ASSERT(). - If Length in SmBusAddress is not zero, then ASSERT(). - If any reserved bits of SmBusAddress are set, then ASSERT(). - - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param Value The 8-bit value to send. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - - @return The parameter of Value. - -**/ -UINT8 -EFIAPI -SmBusSendByte ( - IN UINTN SmBusAddress, - IN UINT8 Value, - OUT RETURN_STATUS *Status OPTIONAL - ) -{ - UINT8 ValueReturn =3D 0; - - ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) =3D=3D 0); - - ValueReturn =3D (UINT8) InternalSmBusNonBlock ( - V_PCH_SMBUS_SMB_CMD_BYTE, - SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE, - Value, - Status - ); - return ValueReturn; - - } - -/** - Executes an SMBUS read data byte command. - - Executes an SMBUS read data byte command on the SMBUS device specified b= y SmBusAddress. - Only the SMBUS slave address and SMBUS command fields of SmBusAddress ar= e required. - The 8-bit value read from the SMBUS is returned. - If Status is not NULL, then the status of the executed command is return= ed in Status. - If Length in SmBusAddress is not zero, then ASSERT(). - If any reserved bits of SmBusAddress are set, then ASSERT(). - - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - - @return The byte read from the SMBUS. - -**/ -UINT8 -EFIAPI -SmBusReadDataByte ( - IN UINTN SmBusAddress, - OUT RETURN_STATUS *Status OPTIONAL - ) -{ - UINT8 ValueReturn =3D 0; - - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) =3D=3D 0); - ValueReturn =3D (UINT8) InternalSmBusNonBlock ( - V_PCH_SMBUS_SMB_CMD_BYTE_DATA, - SmBusAddress | B_PCH_SMBUS_RW_SEL_READ, - 0, - Status - ); - return ValueReturn; -} - -/** - Executes an SMBUS write data byte command. - - Executes an SMBUS write data byte command on the SMBUS device specified = by SmBusAddress. - The 8-bit value specified by Value is written. - Only the SMBUS slave address and SMBUS command fields of SmBusAddress ar= e required. - Value is returned. - If Status is not NULL, then the status of the executed command is return= ed in Status. - If Length in SmBusAddress is not zero, then ASSERT(). - If any reserved bits of SmBusAddress are set, then ASSERT(). - - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param Value The 8-bit value to write. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - - @return The parameter of Value. - -**/ -UINT8 -EFIAPI -SmBusWriteDataByte ( - IN UINTN SmBusAddress, - IN UINT8 Value, - OUT RETURN_STATUS *Status OPTIONAL - ) -{ - UINT8 ValueReturn =3D 0; - - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) =3D=3D 0); - - ValueReturn =3D (UINT8) InternalSmBusNonBlock ( - V_PCH_SMBUS_SMB_CMD_BYTE_DATA, - SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE, - Value, - Status - ); - return ValueReturn; - -} - -/** - Executes an SMBUS read data word command. - - Executes an SMBUS read data word command on the SMBUS device specified b= y SmBusAddress. - Only the SMBUS slave address and SMBUS command fields of SmBusAddress ar= e required. - The 16-bit value read from the SMBUS is returned. - If Status is not NULL, then the status of the executed command is return= ed in Status. - If Length in SmBusAddress is not zero, then ASSERT(). - If any reserved bits of SmBusAddress are set, then ASSERT(). - - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - - @return The byte read from the SMBUS. - -**/ -UINT16 -EFIAPI -SmBusReadDataWord ( - IN UINTN SmBusAddress, - OUT RETURN_STATUS *Status OPTIONAL - ) -{ - UINT16 ValueReturn =3D 0; - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) =3D=3D 0); - - ValueReturn =3D InternalSmBusNonBlock ( - V_PCH_SMBUS_SMB_CMD_WORD_DATA, - SmBusAddress | B_PCH_SMBUS_RW_SEL_READ, - 0, - Status - ); - return ValueReturn; - -} - -/** - Executes an SMBUS write data word command. - - Executes an SMBUS write data word command on the SMBUS device specified = by SmBusAddress. - The 16-bit value specified by Value is written. - Only the SMBUS slave address and SMBUS command fields of SmBusAddress ar= e required. - Value is returned. - If Status is not NULL, then the status of the executed command is return= ed in Status. - If Length in SmBusAddress is not zero, then ASSERT(). - If any reserved bits of SmBusAddress are set, then ASSERT(). - - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param Value The 16-bit value to write. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - - @return The parameter of Value. - -**/ -UINT16 -EFIAPI -SmBusWriteDataWord ( - IN UINTN SmBusAddress, - IN UINT16 Value, - OUT RETURN_STATUS *Status OPTIONAL - ) -{ - UINT16 ValueReturn =3D 0; - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) =3D=3D 0); - - ValueReturn =3D InternalSmBusNonBlock ( - V_PCH_SMBUS_SMB_CMD_WORD_DATA, - SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE, - Value, - Status - ); - return ValueReturn; -} - -/** - Executes an SMBUS process call command. - - Executes an SMBUS process call command on the SMBUS device specified by = SmBusAddress. - The 16-bit value specified by Value is written. - Only the SMBUS slave address and SMBUS command fields of SmBusAddress ar= e required. - The 16-bit value returned by the process call command is returned. - If Status is not NULL, then the status of the executed command is return= ed in Status. - If Length in SmBusAddress is not zero, then ASSERT(). - If any reserved bits of SmBusAddress are set, then ASSERT(). - - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param Value The 16-bit value to write. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - - @return The 16-bit value returned by the process call command. - -**/ -UINT16 -EFIAPI -SmBusProcessCall ( - IN UINTN SmBusAddress, - IN UINT16 Value, - OUT RETURN_STATUS *Status OPTIONAL - ) -{ - UINT16 ValueReturn =3D 0; - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) =3D=3D 0); - - ValueReturn =3D InternalSmBusNonBlock ( - V_PCH_SMBUS_SMB_CMD_PROCESS_CALL, - SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE, - Value, - Status - ); - return ValueReturn; -} - -/** - Executes an SMBUS block command. - - Executes an SMBUS block read, block write and block write-block read com= mand - on the SMBUS device specified by SmBusAddress. - Bytes are read from the SMBUS and stored in Buffer. - The number of bytes read is returned, and will never return a value larg= er than 32-bytes. - If Status is not NULL, then the status of the executed command is return= ed in Status. - It is the caller's responsibility to make sure Buffer is large enough fo= r the total number of bytes read. - SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not n= eed to be any larger than 32 bytes. - - @param HostControl The value of Host Control Register to set. - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param WriteBuffer Pointer to the buffer of bytes to write to the S= MBUS. - @param ReadBuffer Pointer to the buffer of bytes to read from the = SMBUS. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - - @return The number of bytes read from the SMBUS. - -**/ -UINTN -InternalSmBusBlock ( - IN UINT8 HostControl, - IN UINTN SmBusAddress, - IN UINT8 *WriteBuffer, - OUT UINT8 *ReadBuffer, - OUT RETURN_STATUS *Status - ) -{ - RETURN_STATUS ReturnStatus; - UINTN Index; - UINTN BytesCount; - UINTN IoPortBaseAddress; - UINT8 AuxiliaryControl; - - IoPortBaseAddress =3D InternalGetSmbusIoPortBaseAddress (); - - BytesCount =3D SMBUS_LIB_LENGTH (SmBusAddress); - - // - // Try to acquire the ownership of ICH SMBUS. - // - ReturnStatus =3D InternalSmBusAcquire (IoPortBaseAddress); - if (RETURN_ERROR (ReturnStatus)) { - goto Done; - } - - // - // Set the appropriate Host Control Register and auxiliary Control Regis= ter. - // - AuxiliaryControl =3D B_PCH_SMBUS_E32B; - if (SMBUS_LIB_PEC (SmBusAddress)) { - AuxiliaryControl |=3D B_PCH_SMBUS_AAC; - HostControl |=3D B_PCH_SMBUS_PEC_EN; - } - - // - // Set Host Command Register. - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAN= D (SmBusAddress)); - - // - // Set Auxiliary Control Regiester. - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_AUXC, AuxiliaryControl); - - // - // Clear byte pointer of 32-byte buffer. - // - IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HCTL); - - if (WriteBuffer !=3D NULL) { - // - // Write the number of block to Host Block Data Byte Register. - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD0, (UINT8) BytesCount); - - // - // Write data block to Host Block Data Register. - // - for (Index =3D 0; Index < BytesCount; Index++) { - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HBD, WriteBuffer[Index]); - } - } - - // - // Set SMBUS slave address for the device to send/receive from. - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_TSA, (UINT8) SmBusAddress); - - // - // Start the SMBUS transaction and wait for the end. - // - ReturnStatus =3D InternalSmBusStart (IoPortBaseAddress, HostControl); - if (RETURN_ERROR (ReturnStatus)) { - goto Done; - } - - if (ReadBuffer !=3D NULL) { - // - // Read the number of block from host block data byte register. - // - BytesCount =3D IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HD0); - - // - // Write data block from Host Block Data Register. - // - for (Index =3D 0; Index < BytesCount; Index++) { - ReadBuffer[Index] =3D IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HBD); - } - } - -Done: - // - // Clear Host Status Register and Auxiliary Status Register. - // - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS, B_PCH_SMBUS_HSTS_ALL); - IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_AUXS, B_PCH_SMBUS_CRCE); - - if (Status !=3D NULL) { - *Status =3D ReturnStatus; - } - - return BytesCount; -} - -/** - Executes an SMBUS read block command. - - Executes an SMBUS read block command on the SMBUS device specified by Sm= BusAddress. - Only the SMBUS slave address and SMBUS command fields of SmBusAddress ar= e required. - Bytes are read from the SMBUS and stored in Buffer. - The number of bytes read is returned, and will never return a value larg= er than 32-bytes. - If Status is not NULL, then the status of the executed command is return= ed in Status. - It is the caller's responsibility to make sure Buffer is large enough fo= r the total number of bytes read. - SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not n= eed to be any larger than 32 bytes. - If Length in SmBusAddress is not zero, then ASSERT(). - If Buffer is NULL, then ASSERT(). - If any reserved bits of SmBusAddress are set, then ASSERT(). - - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param Buffer Pointer to the buffer to store the bytes read fr= om the SMBUS. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - - @return The number of bytes read. - -**/ -UINTN -EFIAPI -SmBusReadBlock ( - IN UINTN SmBusAddress, - OUT VOID *Buffer, - OUT RETURN_STATUS *Status OPTIONAL - ) -{ - UINTN BytesCount =3D 0; - - ASSERT (Buffer !=3D NULL); - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) =3D=3D 0); - ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) =3D=3D 0); - - - BytesCount =3D InternalSmBusBlock ( - V_PCH_SMBUS_SMB_CMD_BLOCK, - SmBusAddress | B_PCH_SMBUS_RW_SEL_READ, - NULL, - Buffer, - Status - ); - return BytesCount; - -} - -/** - Executes an SMBUS write block command. - - Executes an SMBUS write block command on the SMBUS device specified by S= mBusAddress. - The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBus= Address are required. - Bytes are written to the SMBUS from Buffer. - The number of bytes written is returned, and will never return a value l= arger than 32-bytes. - If Status is not NULL, then the status of the executed command is return= ed in Status. - If Length in SmBusAddress is zero or greater than 32, then ASSERT(). - If Buffer is NULL, then ASSERT(). - If any reserved bits of SmBusAddress are set, then ASSERT(). - - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param Buffer Pointer to the buffer to store the bytes read fr= om the SMBUS. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - - @return The number of bytes written. - -**/ -UINTN -EFIAPI -SmBusWriteBlock ( - IN UINTN SmBusAddress, - OUT VOID *Buffer, - OUT RETURN_STATUS *Status OPTIONAL - ) -{ - UINTN BytesCount =3D 0; - - ASSERT (Buffer !=3D NULL); - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >=3D 1); - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <=3D 32); - ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) =3D=3D 0); - - - BytesCount =3D InternalSmBusBlock ( - - V_PCH_SMBUS_SMB_CMD_BLOCK, - SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE, - Buffer, - NULL, - Status - ); - - return BytesCount; -} - -/** - Executes an SMBUS block process call command. - - Executes an SMBUS block process call command on the SMBUS device specifi= ed by SmBusAddress. - The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBus= Address are required. - Bytes are written to the SMBUS from WriteBuffer. Bytes are then read fr= om the SMBUS into ReadBuffer. - If Status is not NULL, then the status of the executed command is return= ed in Status. - It is the caller's responsibility to make sure ReadBuffer is large enoug= h for the total number of bytes read. - SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not n= eed to be any larger than 32 bytes. - If Length in SmBusAddress is zero or greater than 32, then ASSERT(). - If WriteBuffer is NULL, then ASSERT(). - If ReadBuffer is NULL, then ASSERT(). - If any reserved bits of SmBusAddress are set, then ASSERT(). - - @param SmBusAddress Address that encodes the SMBUS Slave Address, - SMBUS Command, SMBUS Data Length, and PEC. - @param WriteBuffer Pointer to the buffer of bytes to write to the S= MBUS. - @param ReadBuffer Pointer to the buffer of bytes to read from the = SMBUS. - @param Status Return status for the executed command. - This is an optional parameter and may be NULL. - - @return The number of bytes written. - -**/ -UINTN -EFIAPI -SmBusBlockProcessCall ( - IN UINTN SmBusAddress, - IN VOID *WriteBuffer, - OUT VOID *ReadBuffer, - OUT RETURN_STATUS *Status OPTIONAL - ) -{ - UINTN BytesCount =3D 0; - - ASSERT (WriteBuffer !=3D NULL); - ASSERT (ReadBuffer !=3D NULL); - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >=3D 1); - ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <=3D 32); - ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) =3D=3D 0); - - BytesCount =3D InternalSmBusBlock ( - V_PCH_SMBUS_SMB_CMD_BLOCK_PROCESS, - SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE, - WriteBuffer, - ReadBuffer, - Status - ); - return BytesCount; - - } diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.inf= b/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.inf deleted file mode 100644 index b13e3de0cc..0000000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.inf +++ /dev/null @@ -1,46 +0,0 @@ -## @file -# Component description file for Intel Ich9 Smbus Library. -# -# SMBUS Library that layers on top of the I/O Library to directly -# access a standard SMBUS host controller. -# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.
-# = =20 -# SPDX-License-Identifier: BSD-2-Clause-Patent - -# = =20 -# -# -# -## - -[Defines] - INF_VERSION =3D 0x00010005 - BASE_NAME =3D SmbusLib - FILE_GUID =3D 0558CAEA-FEF3-4b6d-915E-8742EFE6DEE1 - MODULE_TYPE =3D BASE - VERSION_STRING =3D 1.0 - LIBRARY_CLASS =3D SmbusLib - -# -# The following information is for reference only and not required by the = build tools. -# -# VALID_ARCHITECTURES =3D IA32 X64 EBC -# - -[Sources] - SmbusLib.c - -[Packages] - Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec - MdePkg/MdePkg.dec - Vlv2TbltDevicePkg/PlatformPkg.dec - -[LibraryClasses] - PcdLib - DebugLib - PciLib - IoLib - -[Pcd.common] - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress - diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/Dimm.c b/Plat= form/Intel/Vlv2TbltDevicePkg/PlatformInitPei/Dimm.c deleted file mode 100644 index 3fda6313d0..0000000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/Dimm.c +++ /dev/null @@ -1,319 +0,0 @@ -/** @file - - Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
- = =20 - SPDX-License-Identifier: BSD-2-Clause-Patent - - = =20 - -Module Name: - - - Dimm.c - -Abstract: - - PPI for reading SPD modules on DIMMs. - ---*/ - - -// -// Header Files -// -#include "Platformearlyinit.h" - -#define DIMM_SOCKETS 4 // Total number of DIMM sockets allowed on - // the platform -#define DIMM_SEGMENTS 1 // Total number of Segments Per DIMM. -#define MEMORY_CHANNELS 2 // Total number of memory channels - // populated on the system board -// -// Prototypes -// - -EFI_STATUS -EFIAPI -GetDimmState ( - IN EFI_PEI_SERVICES **PeiServices, - IN PEI_PLATFORM_DIMM_PPI *This, - IN UINT8 Dimm, - OUT PEI_PLATFORM_DIMM_STATE *State - ); - -EFI_STATUS -EFIAPI -SetDimmState ( - IN EFI_PEI_SERVICES **PeiServices, - IN PEI_PLATFORM_DIMM_PPI *This, - IN UINT8 Dimm, - IN PEI_PLATFORM_DIMM_STATE *State - ); - -EFI_STATUS -EFIAPI -ReadSpd ( - IN EFI_PEI_SERVICES **PeiServices, - IN PEI_PLATFORM_DIMM_PPI *This, - IN UINT8 Dimm, - IN UINT8 Offset, - IN UINTN Count, - IN OUT UINT8 *Buffer - ); - -static PEI_PLATFORM_DIMM_PPI mGchDimmPpi =3D { - DIMM_SOCKETS, - DIMM_SEGMENTS, - MEMORY_CHANNELS, - GetDimmState, - SetDimmState, - ReadSpd -}; - -static EFI_PEI_PPI_DESCRIPTOR mPpiPlatformDimm =3D { - (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST), - &gPeiPlatformDimmPpiGuid, - &mGchDimmPpi -}; - - -// -// Functions -// - -/** - This function returns the current state of a single DIMM. Present indic= ates - that the DIMM slot is physically populated. Disabled indicates that the= DIMM - should not be used. - - @param PeiServices PEI services table pointer - @param This PPI pointer - @param Dimm DIMM to read from - @param State Pointer to a return buffer to be updated with the c= urrent state - of the DIMM - - @retval EFI_SUCCESS The function completed successfully. - -**/ -EFI_STATUS -EFIAPI -GetDimmState ( - IN EFI_PEI_SERVICES **PeiServices, - IN PEI_PLATFORM_DIMM_PPI *This, - IN UINT8 Dimm, - OUT PEI_PLATFORM_DIMM_STATE *State - ) -{ - EFI_STATUS Status; - UINT8 Buffer; - - PEI_ASSERT (PeiServices, (Dimm < This->DimmSockets)); - - // - // A failure here does not necessarily mean that no DIMM is present. - // Read a single byte. All we care about is the return status. - // - Status =3D ReadSpd ( - PeiServices, - This, - Dimm, - 0, - 1, - &Buffer - ); - - if (EFI_ERROR (Status)) { - State->Present =3D 0; - } else { - State->Present =3D 1; - } - - // - // BUGBUG: Update to check platform variable when it is available - // - State->Disabled =3D 0; - State->Reserved =3D 0; - - return EFI_SUCCESS; -} - -/** - - This function updates the state of a single DIMM. - - @param PeiServices PEI services table pointer - @param This PPI pointer - @param Dimm DIMM to set state for - @param State Pointer to the state information to set. - - @retval EFI_SUCCESS The function completed successfully. - @retval EFI_UNSUPPORTED The function is not supported. - -**/ -EFI_STATUS -EFIAPI -SetDimmState ( - IN EFI_PEI_SERVICES **PeiServices, - IN PEI_PLATFORM_DIMM_PPI *This, - IN UINT8 Dimm, - IN PEI_PLATFORM_DIMM_STATE *State - ) -{ - return EFI_UNSUPPORTED; -} - -/** - This function reads SPD information from a DIMM. - - PeiServices PEI services table pointer - This PPI pointer - Dimm DIMM to read from - Offset Offset in DIMM - Count Number of bytes - Buffer Return buffer - - @param EFI_SUCCESS The function completed successfully. - @param EFI_DEVICE_ERROR The DIMM being accessed reported a devic= e error, - does not have an SPD module, or is not i= nstalled in - the system. - @retval EFI_TIMEOUT Time out trying to read the SPD module. - @retval EFI_INVALID_PARAMETER A parameter was outside the legal limits= . - -**/ -EFI_STATUS -EFIAPI -ReadSpd ( - IN EFI_PEI_SERVICES **PeiServices, - IN PEI_PLATFORM_DIMM_PPI *This, - IN UINT8 Dimm, - IN UINT8 Offset, - IN UINTN Count, - IN OUT UINT8 *Buffer - ) -{ - EFI_STATUS Status; - PEI_SMBUS_PPI *Smbus; - UINTN Index; - UINTN Index1; - EFI_SMBUS_DEVICE_ADDRESS SlaveAddress; - EFI_SMBUS_DEVICE_COMMAND Command; - UINTN Length; - - Status =3D (**PeiServices).LocatePpi ( - PeiServices, - &gPeiSmbusPpiGuid, // GUID - 0, // INSTANCE - NULL, // EFI_PEI_PPI_DESCRIPTO= R - &Smbus // PPI - ); - ASSERT_PEI_ERROR (PeiServices, Status); - - switch (Dimm) { - case 0: - SlaveAddress.SmbusDeviceAddress =3D SMBUS_ADDR_CH_A_1 >> 1; - break; - case 1: - SlaveAddress.SmbusDeviceAddress =3D SMBUS_ADDR_CH_A_2 >> 1; - break; - case 2: - SlaveAddress.SmbusDeviceAddress =3D SMBUS_ADDR_CH_B_1 >> 1; - break; - case 3: - SlaveAddress.SmbusDeviceAddress =3D SMBUS_ADDR_CH_B_2 >> 1; - break; - default: - return EFI_INVALID_PARAMETER; - } - - Index =3D Count % 4; - if (Index !=3D 0) { - // - // read the first serveral bytes to speed up following reading - // - for (Index1 =3D 0; Index1 < Index; Index1++) { - Length =3D 1; - Command =3D Offset + Index1; - Status =3D Smbus->Execute ( - PeiServices, - Smbus, - SlaveAddress, - Command, - EfiSmbusReadByte, - FALSE, - &Length, - &Buffer[Index1] - ); - if (EFI_ERROR(Status)) { - return Status; - } - } - } - - // - // Now collect all the remaining bytes on 4 bytes block - // - for (; Index < Count; Index +=3D 2) { - Command =3D Index + Offset; - Length =3D 2; - Status =3D Smbus->Execute ( - PeiServices, - Smbus, - SlaveAddress, - Command, - EfiSmbusReadWord, - FALSE, - &Length, - &Buffer[Index] - ); - if (EFI_ERROR(Status)) { - return Status; - } - - Index +=3D 2; - Command =3D Index + Offset; - Length =3D 2; - Status =3D Smbus->Execute ( - PeiServices, - Smbus, - SlaveAddress, - Command, - EfiSmbusReadWord, - FALSE, - &Length, - &Buffer[Index] - ); - if (EFI_ERROR(Status)) { - return Status; - } - } - return EFI_SUCCESS; -} - -/** - This function initializes the PEIM. It simply installs the DIMM PPI. - - @param FfsHeader Not used by this function - @param PeiServices Pointer to PEI services table - - @retval EFI_SUCCESS The function completed successfully. - -**/ -EFI_STATUS -EFIAPI -PeimInitializeDimm ( - IN EFI_PEI_SERVICES **PeiServices, - IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor, - IN VOID *SmbusPpi - ) -{ - EFI_STATUS Status; - - Status =3D (**PeiServices).InstallPpi ( - PeiServices, - &mPpiPlatformDimm - ); - ASSERT_PEI_ERROR (PeiServices, Status); - - return EFI_SUCCESS; -} - diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarly= Init.h b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit= .h index 9631d49a84..6a2ecf8fb4 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h @@ -59,7 +59,7 @@ Abstract: #include #include #include -#include +#include #include #include #include @@ -1454,14 +1454,6 @@ SetDxeCacheMode ( IN CONST EFI_PEI_SERVICES **PeiServices ); =20 -EFI_STATUS -GPIO_initialization ( - IN EFI_PEI_SERVICES **PeiServices, - IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor, - IN VOID *SmbusPpi - ); - - BOOLEAN IsRtcUipAlwaysSet ( IN CONST EFI_PEI_SERVICES **PeiServices diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/CommonHeader.h b/= Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/CommonHeader.h index a533f3918c..c18cabb2f2 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/CommonHeader.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/CommonHeader.h @@ -42,7 +42,6 @@ #include #include #include -#include #include #include #include diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf b= /Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf index 28a5274c40..d3969f2344 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf @@ -72,7 +72,6 @@ [LibraryClasses] DebugLib HobLib IoLib - MultiPlatformLib MtrrLib PerformanceLib MonoStatusCodeLib diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc b/Platf= orm/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc index b16883e98c..3910281c49 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc @@ -171,7 +171,7 @@ [LibraryClasses.common] # # ICH # - SmbusLib|Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.inf + SmbusLib|MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.inf SmmLib|Vlv2TbltDevicePkg/Library/PchSmmLib/PchSmmLib.inf =20 # diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc b/Platfor= m/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc index c9335a98c8..2ae594e5be 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc @@ -169,7 +169,7 @@ [LibraryClasses.common] # # ICH # - SmbusLib|Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.inf + SmbusLib|MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.inf SmmLib|Vlv2TbltDevicePkg/Library/PchSmmLib/PchSmmLib.inf =20 # diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc b/Platform= /Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc index fd9ddebfd9..5cdc9bebc8 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc @@ -171,7 +171,7 @@ [LibraryClasses.common] # # ICH # - SmbusLib|Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.inf + SmbusLib|MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.inf SmmLib|Vlv2TbltDevicePkg/Library/PchSmmLib/PchSmmLib.inf =20 # --=20 2.21.0.windows.1