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From: "Tian, Feng" <feng.tian@intel.com>
To: Haojian Zhuang <haojian.zhuang@linaro.org>,
	"leif.lindholm@linaro.org" <leif.lindholm@linaro.org>,
	"ard.biesheuvel@linaro.org" <ard.biesheuvel@linaro.org>,
	"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: "Tian, Feng" <feng.tian@intel.com>
Subject: Re: [PATCH 3/9] Ufs: fix the bit in UFS_HC_UTRLDBR_OFFSET register
Date: Fri, 6 Jan 2017 07:18:05 +0000	[thread overview]
Message-ID: <7F1BAD85ADEA444D97065A60D2E97EE5699A5FDA@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <1483685538-11058-4-git-send-email-haojian.zhuang@linaro.org>

Could you please update the same bug in UfsBlockIoPei driver as well?

And please update all the log headers to: MdeModulePkg/Ufs: xxxx.

Others look good to me.

Reviewed-by: Feng Tian <feng.tian@intel.com>

Thanks
Feng

-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Haojian Zhuang
Sent: Friday, January 6, 2017 2:52 PM
To: Tian, Feng <feng.tian@intel.com>; leif.lindholm@linaro.org; ard.biesheuvel@linaro.org; edk2-devel@lists.01.org
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Subject: [edk2] [PATCH 3/9] Ufs: fix the bit in UFS_HC_UTRLDBR_OFFSET register

When UPIU packet is sent, (BIT0 << Slot) should be set according to context.  But BIT0 is used without Slot when UfsWaitMemSet () is invoked.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
---
 MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
index f160d6a..e556b62 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
@@ -954,7 +954,7 @@ UfsRwDeviceDesc (
   //
   // Wait for the completion of the transfer request.
   //
-  Status = UfsWaitMemSet (Private, UFS_HC_UTRLDBR_OFFSET, BIT0, 0, Packet.Timeout);
+  Status = UfsWaitMemSet (Private, UFS_HC_UTRLDBR_OFFSET, BIT0 << Slot, 
+ 0, Packet.Timeout);
   if (EFI_ERROR (Status)) {
     goto Exit;
   }
@@ -1077,7 +1077,7 @@ UfsRwAttributes (
   //
   // Wait for the completion of the transfer request.
   //
-  Status = UfsWaitMemSet (Private, UFS_HC_UTRLDBR_OFFSET, BIT0, 0, Packet.Timeout);
+  Status = UfsWaitMemSet (Private, UFS_HC_UTRLDBR_OFFSET, BIT0 << Slot, 
+ 0, Packet.Timeout);
   if (EFI_ERROR (Status)) {
     goto Exit;
   }
@@ -1201,7 +1201,7 @@ UfsRwFlags (
   //
   // Wait for the completion of the transfer request.
   //
-  Status = UfsWaitMemSet (Private, UFS_HC_UTRLDBR_OFFSET, BIT0, 0, Packet.Timeout);
+  Status = UfsWaitMemSet (Private, UFS_HC_UTRLDBR_OFFSET, BIT0 << Slot, 
+ 0, Packet.Timeout);
   if (EFI_ERROR (Status)) {
     goto Exit;
   }
@@ -1368,7 +1368,7 @@ UfsExecNopCmds (
   //
   // Wait for the completion of the transfer request.
   //
-  Status = UfsWaitMemSet (Private, UFS_HC_UTRLDBR_OFFSET, BIT0, 0, UFS_TIMEOUT);
+  Status = UfsWaitMemSet (Private, UFS_HC_UTRLDBR_OFFSET, BIT0 << Slot, 
+ 0, UFS_TIMEOUT);
   if (EFI_ERROR (Status)) {
     goto Exit;
   }
@@ -1534,7 +1534,7 @@ UfsExecScsiCmds (
   //
   // Wait for the completion of the transfer request.
   //
-  Status = UfsWaitMemSet (Private, UFS_HC_UTRLDBR_OFFSET, BIT0, 0, Packet->Timeout);
+  Status = UfsWaitMemSet (Private, UFS_HC_UTRLDBR_OFFSET, BIT0 << 
+ TransReq->Slot, 0, Packet->Timeout);
   if (EFI_ERROR (Status)) {
     goto Exit;
   }
--
2.7.4

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  reply	other threads:[~2017-01-06  7:18 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-06  6:52 [PATCH 0/9] enhance UFS Haojian Zhuang
2017-01-06  6:52 ` [PATCH 1/9] Ufs: fix data direction checking Haojian Zhuang
2017-01-06  7:08   ` Tian, Feng
2017-01-06  8:33     ` Haojian Zhuang
2017-01-06  6:52 ` [PATCH 2/9] Ufs: fix to identify 32 bits address mode Haojian Zhuang
2017-01-06  7:10   ` Tian, Feng
2017-01-06  6:52 ` [PATCH 3/9] Ufs: fix the bit in UFS_HC_UTRLDBR_OFFSET register Haojian Zhuang
2017-01-06  7:18   ` Tian, Feng [this message]
2017-01-06  6:52 ` [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register Haojian Zhuang
2017-01-06  8:36   ` Tian, Feng
2017-01-06  9:05     ` Haojian Zhuang
2017-01-09  1:25       ` Tian, Feng
2017-01-06  6:52 ` [PATCH 5/9] Ufs: fix to set PRDT length Haojian Zhuang
2017-01-06  6:52 ` [PATCH 6/9] Ufs: add PhyInit Haojian Zhuang
2017-01-06  7:27   ` Tian, Feng
2017-01-06  8:21     ` Haojian Zhuang
2017-01-06  8:44       ` Tian, Feng
2017-01-06  6:52 ` [PATCH 7/9] Ufs: fix initialize OCS value to 0x0F Haojian Zhuang
2017-01-06  7:26   ` Tian, Feng
2017-01-06  8:18     ` Haojian Zhuang
2017-01-06  6:52 ` [PATCH 8/9] Ufs: fix to add cache operation Haojian Zhuang
2017-01-06  8:42   ` Tian, Feng
2017-01-06  6:52 ` [PATCH 9/9] ScsiDisk: retry if device detected power failure Haojian Zhuang
2017-01-06  8:22   ` Tian, Feng
2017-01-06  8:31     ` Haojian Zhuang

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