From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E09B98180C for ; Fri, 6 Jan 2017 00:36:35 -0800 (PST) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP; 06 Jan 2017 00:36:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,323,1477983600"; d="scan'208";a="49934067" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga005.jf.intel.com with ESMTP; 06 Jan 2017 00:36:35 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 6 Jan 2017 00:36:34 -0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.177]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.204]) with mapi id 14.03.0248.002; Fri, 6 Jan 2017 16:36:31 +0800 From: "Tian, Feng" To: Haojian Zhuang , "leif.lindholm@linaro.org" , "ard.biesheuvel@linaro.org" , "edk2-devel@lists.01.org" CC: "Tian, Feng" Thread-Topic: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register Thread-Index: AQHSZ+l9OoBuA7xxsUqfdDC34UZnQqErH6QQ Date: Fri, 6 Jan 2017 08:36:30 +0000 Message-ID: <7F1BAD85ADEA444D97065A60D2E97EE5699A60C7@SHSMSX101.ccr.corp.intel.com> References: <1483685538-11058-1-git-send-email-haojian.zhuang@linaro.org> <1483685538-11058-5-git-send-email-haojian.zhuang@linaro.org> In-Reply-To: <1483685538-11058-5-git-send-email-haojian.zhuang@linaro.org> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 06 Jan 2017 08:36:36 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi, Haojian If the UTRLBA & UTRLBAU gets changed like below, the doorbell location also= should be updated. So I don't suggest to update them. Thanks Feng -----Original Message----- From: Haojian Zhuang [mailto:haojian.zhuang@linaro.org]=20 Sent: Friday, January 6, 2017 2:52 PM To: Tian, Feng ; leif.lindholm@linaro.org; ard.biesheu= vel@linaro.org; edk2-devel@lists.01.org Cc: Haojian Zhuang Subject: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register Although UfsInitTransferRequestList () assigns UTRLBA && UTRLBAU registers,= UfsCreateScsiCommandDesc () creates a page of command buffer. It means tha= t UTRLBA && UTRLBAU registers should be updated. Always set UTRLBA && UTRLBAU registers before sending UPIU packet. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang --- MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c b/MdeModu= lePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c index e556b62..5c256a9 100644 --- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c +++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c @@ -937,6 +937,8 @@ UfsRwDeviceDesc ( if (EFI_ERROR (Status)) { return Status; } + UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd &=20 + 0xffffffff); + UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) &=20 + 0xffffffff); =20 // // Check the transfer request result. @@ -1060,6 +1062,8 @@ UfsRwAttributes ( if (EFI_ERROR (Status)) { return Status; } + UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd &=20 + 0xffffffff); + UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) &=20 + 0xffffffff); =20 // // Check the transfer request result. @@ -1184,6 +1188,8 @@ UfsRwFlags ( if (EFI_ERROR (Status)) { return Status; } + UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd &=20 + 0xffffffff); + UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) &=20 + 0xffffffff); =20 // // Check the transfer request result. @@ -1351,6 +1357,8 @@ UfsExecNopCmds ( if (EFI_ERROR (Status)) { return Status; } + UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd &=20 + 0xffffffff); + UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) &=20 + 0xffffffff); =20 // // Check the transfer request result. @@ -1473,6 +1481,8 @@ UfsExecScsiCmds ( if (EFI_ERROR (Status)) { return Status; } + UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)TransReq->Trd &=20 + 0xffffffff); + UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)TransReq->Trd=20 + >> 32) & 0xffffffff); =20 TransReq->CmdDescSize =3D TransReq->Trd->PrdtO * sizeof (UINT32) + Trans= Req->Trd->PrdtL * sizeof (UTP_TR_PRD); =20 -- 2.7.4