From: "Tian, Feng" <feng.tian@intel.com>
To: Haojian Zhuang <haojian.zhuang@linaro.org>,
"leif.lindholm@linaro.org" <leif.lindholm@linaro.org>,
"ard.biesheuvel@linaro.org" <ard.biesheuvel@linaro.org>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: "Tian, Feng" <feng.tian@intel.com>
Subject: Re: [PATCH 8/9] Ufs: fix to add cache operation
Date: Fri, 6 Jan 2017 08:42:56 +0000 [thread overview]
Message-ID: <7F1BAD85ADEA444D97065A60D2E97EE5699A60DD@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <1483685538-11058-9-git-send-email-haojian.zhuang@linaro.org>
Haojian,
The CmdDescHost is a EdkiiUfsHcOperationBusMasterCommonBuffer common buffer, which means Host and DMA could access this region at the same time. So there is no cache coherent issue:)
Thanks
Feng
-----Original Message-----
From: Haojian Zhuang [mailto:haojian.zhuang@linaro.org]
Sent: Friday, January 6, 2017 2:52 PM
To: Tian, Feng <feng.tian@intel.com>; leif.lindholm@linaro.org; ard.biesheuvel@linaro.org; edk2-devel@lists.01.org
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Subject: [PATCH 8/9] Ufs: fix to add cache operation
Since command UPIU is initialized with virtual address that CPU accesses, need to add cache operation.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
---
MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h | 1 +
MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf | 1 +
MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c | 8 ++++++++
3 files changed, 10 insertions(+)
diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h
index 7fc82ba..af13757 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h
@@ -26,6 +26,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h> #include <Library/UefiBootServicesTableLib.h>
+#include <Library/CacheMaintenanceLib.h>
#include <Library/DevicePathLib.h>
#include <Library/TimerLib.h>
diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf
index c90c72f..254f51a 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf
@@ -49,6 +49,7 @@
BaseMemoryLib
UefiLib
BaseLib
+ CacheMaintenanceLib
UefiDriverEntryPoint
DebugLib
DevicePathLib
diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
index db70fb1..98a17ac 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
@@ -1449,6 +1449,7 @@ UfsExecScsiCmds (
UTP_TR_PRD *PrdtBase;
EFI_TPL OldTpl;
UFS_PASS_THRU_TRANS_REQ *TransReq;
+ UINTN TotalLen;
TransReq = AllocateZeroPool (sizeof (UFS_PASS_THRU_TRANS_REQ));
if (TransReq == NULL) {
@@ -1521,6 +1522,13 @@ UfsExecScsiCmds (
UfsInitUtpPrdt (PrdtBase, (VOID*)(UINTN)DataBufPhyAddr, DataLen);
//
+ // Flush & invalidate data cache since CmdDescHost is virtual address
+ // and Command UPIU is updated after Map ().
+ //
+ TotalLen = (TransReq->Trd->PrdtO << 2) + (TransReq->Trd->PrdtL << 2);
+ WriteBackInvalidateDataCacheRange (TransReq->CmdDescHost, TotalLen);
+
+ //
// Insert the async SCSI cmd to the Async I/O list
//
if (Event != NULL) {
--
2.7.4
next prev parent reply other threads:[~2017-01-06 8:42 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-06 6:52 [PATCH 0/9] enhance UFS Haojian Zhuang
2017-01-06 6:52 ` [PATCH 1/9] Ufs: fix data direction checking Haojian Zhuang
2017-01-06 7:08 ` Tian, Feng
2017-01-06 8:33 ` Haojian Zhuang
2017-01-06 6:52 ` [PATCH 2/9] Ufs: fix to identify 32 bits address mode Haojian Zhuang
2017-01-06 7:10 ` Tian, Feng
2017-01-06 6:52 ` [PATCH 3/9] Ufs: fix the bit in UFS_HC_UTRLDBR_OFFSET register Haojian Zhuang
2017-01-06 7:18 ` Tian, Feng
2017-01-06 6:52 ` [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register Haojian Zhuang
2017-01-06 8:36 ` Tian, Feng
2017-01-06 9:05 ` Haojian Zhuang
2017-01-09 1:25 ` Tian, Feng
2017-01-06 6:52 ` [PATCH 5/9] Ufs: fix to set PRDT length Haojian Zhuang
2017-01-06 6:52 ` [PATCH 6/9] Ufs: add PhyInit Haojian Zhuang
2017-01-06 7:27 ` Tian, Feng
2017-01-06 8:21 ` Haojian Zhuang
2017-01-06 8:44 ` Tian, Feng
2017-01-06 6:52 ` [PATCH 7/9] Ufs: fix initialize OCS value to 0x0F Haojian Zhuang
2017-01-06 7:26 ` Tian, Feng
2017-01-06 8:18 ` Haojian Zhuang
2017-01-06 6:52 ` [PATCH 8/9] Ufs: fix to add cache operation Haojian Zhuang
2017-01-06 8:42 ` Tian, Feng [this message]
2017-01-06 6:52 ` [PATCH 9/9] ScsiDisk: retry if device detected power failure Haojian Zhuang
2017-01-06 8:22 ` Tian, Feng
2017-01-06 8:31 ` Haojian Zhuang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7F1BAD85ADEA444D97065A60D2E97EE5699A60DD@SHSMSX101.ccr.corp.intel.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox