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* [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register
  2017-01-06  6:52 [PATCH 0/9] enhance UFS Haojian Zhuang
@ 2017-01-06  6:52 ` Haojian Zhuang
  2017-01-06  8:36   ` Tian, Feng
  0 siblings, 1 reply; 8+ messages in thread
From: Haojian Zhuang @ 2017-01-06  6:52 UTC (permalink / raw)
  To: feng.tian, leif.lindholm, ard.biesheuvel, edk2-devel; +Cc: Haojian Zhuang

Although UfsInitTransferRequestList () assigns UTRLBA && UTRLBAU
registers, UfsCreateScsiCommandDesc () creates a page of command
buffer. It means that UTRLBA && UTRLBAU registers should be updated.

Always set UTRLBA && UTRLBAU registers before sending UPIU packet.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
---
 MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
index e556b62..5c256a9 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
@@ -937,6 +937,8 @@ UfsRwDeviceDesc (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd & 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) & 0xffffffff);
 
   //
   // Check the transfer request result.
@@ -1060,6 +1062,8 @@ UfsRwAttributes (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd & 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) & 0xffffffff);
 
   //
   // Check the transfer request result.
@@ -1184,6 +1188,8 @@ UfsRwFlags (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd & 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) & 0xffffffff);
 
   //
   // Check the transfer request result.
@@ -1351,6 +1357,8 @@ UfsExecNopCmds (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd & 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) & 0xffffffff);
 
   //
   // Check the transfer request result.
@@ -1473,6 +1481,8 @@ UfsExecScsiCmds (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)TransReq->Trd & 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)TransReq->Trd >> 32) & 0xffffffff);
 
   TransReq->CmdDescSize = TransReq->Trd->PrdtO * sizeof (UINT32) + TransReq->Trd->PrdtL * sizeof (UTP_TR_PRD);
 
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 8+ messages in thread
* Re: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register
  2017-01-06  6:52 ` [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register Haojian Zhuang
@ 2017-01-06  8:36   ` Tian, Feng
  2017-01-06  9:05     ` Haojian Zhuang
  0 siblings, 1 reply; 8+ messages in thread
From: Tian, Feng @ 2017-01-06  8:36 UTC (permalink / raw)
  To: Haojian Zhuang, leif.lindholm@linaro.org,
	ard.biesheuvel@linaro.org, edk2-devel@lists.01.org
  Cc: Tian, Feng

Hi, Haojian

If the UTRLBA & UTRLBAU gets changed like below, the doorbell location also should be updated. So I don't suggest to update them.

Thanks
Feng

-----Original Message-----
From: Haojian Zhuang [mailto:haojian.zhuang@linaro.org] 
Sent: Friday, January 6, 2017 2:52 PM
To: Tian, Feng <feng.tian@intel.com>; leif.lindholm@linaro.org; ard.biesheuvel@linaro.org; edk2-devel@lists.01.org
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Subject: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register

Although UfsInitTransferRequestList () assigns UTRLBA && UTRLBAU registers, UfsCreateScsiCommandDesc () creates a page of command buffer. It means that UTRLBA && UTRLBAU registers should be updated.

Always set UTRLBA && UTRLBAU registers before sending UPIU packet.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
---
 MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
index e556b62..5c256a9 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
@@ -937,6 +937,8 @@ UfsRwDeviceDesc (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd & 
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) & 
+ 0xffffffff);
 
   //
   // Check the transfer request result.
@@ -1060,6 +1062,8 @@ UfsRwAttributes (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd & 
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) & 
+ 0xffffffff);
 
   //
   // Check the transfer request result.
@@ -1184,6 +1188,8 @@ UfsRwFlags (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd & 
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) & 
+ 0xffffffff);
 
   //
   // Check the transfer request result.
@@ -1351,6 +1357,8 @@ UfsExecNopCmds (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd & 
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) & 
+ 0xffffffff);
 
   //
   // Check the transfer request result.
@@ -1473,6 +1481,8 @@ UfsExecScsiCmds (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)TransReq->Trd & 
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)TransReq->Trd 
+ >> 32) & 0xffffffff);
 
   TransReq->CmdDescSize = TransReq->Trd->PrdtO * sizeof (UINT32) + TransReq->Trd->PrdtL * sizeof (UTP_TR_PRD);
 
--
2.7.4



^ permalink raw reply related	[flat|nested] 8+ messages in thread
* Re: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register
  2017-01-06  8:36   ` Tian, Feng
@ 2017-01-06  9:05     ` Haojian Zhuang
  2017-01-09  1:25       ` Tian, Feng
  0 siblings, 1 reply; 8+ messages in thread
From: Haojian Zhuang @ 2017-01-06  9:05 UTC (permalink / raw)
  To: Tian, Feng, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org,
	edk2-devel@lists.01.org
  Cc: Tian, Feng

Hi Feng,



I don’t understand why doorbell location should be updated too. If we don’t update UTRLBA & UTRLBAU for sending each UPIU packet, we have to extend the size of UTRD packet. Then we could avoid to create a new command buffer.



Best Regards

Haojian



From: Tian, Feng<mailto:feng.tian@intel.com>
Sent: 2017年1月6日 16:36
To: Haojian Zhuang<mailto:haojian.zhuang@linaro.org>; leif.lindholm@linaro.org<mailto:leif.lindholm@linaro.org>; ard.biesheuvel@linaro.org<mailto:ard.biesheuvel@linaro.org>; edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org>
Cc: Tian, Feng<mailto:feng.tian@intel.com>
Subject: RE: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register



Hi, Haojian

If the UTRLBA & UTRLBAU gets changed like below, the doorbell location also should be updated. So I don't suggest to update them.

Thanks
Feng

-----Original Message-----
From: Haojian Zhuang [mailto:haojian.zhuang@linaro.org]
Sent: Friday, January 6, 2017 2:52 PM
To: Tian, Feng <feng.tian@intel.com>; leif.lindholm@linaro.org; ard.biesheuvel@linaro.org; edk2-devel@lists.01.org
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Subject: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register

Although UfsInitTransferRequestList () assigns UTRLBA && UTRLBAU registers, UfsCreateScsiCommandDesc () creates a page of command buffer. It means that UTRLBA && UTRLBAU registers should be updated.

Always set UTRLBA && UTRLBAU registers before sending UPIU packet.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
---
 MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
index e556b62..5c256a9 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
@@ -937,6 +937,8 @@ UfsRwDeviceDesc (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd &
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) &
+ 0xffffffff);

   //
   // Check the transfer request result.
@@ -1060,6 +1062,8 @@ UfsRwAttributes (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd &
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) &
+ 0xffffffff);

   //
   // Check the transfer request result.
@@ -1184,6 +1188,8 @@ UfsRwFlags (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd &
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) &
+ 0xffffffff);

   //
   // Check the transfer request result.
@@ -1351,6 +1357,8 @@ UfsExecNopCmds (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd &
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) &
+ 0xffffffff);

   //
   // Check the transfer request result.
@@ -1473,6 +1481,8 @@ UfsExecScsiCmds (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)TransReq->Trd &
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)TransReq->Trd
+ >> 32) & 0xffffffff);

   TransReq->CmdDescSize = TransReq->Trd->PrdtO * sizeof (UINT32) + TransReq->Trd->PrdtL * sizeof (UTP_TR_PRD);

--
2.7.4


^ permalink raw reply related	[flat|nested] 8+ messages in thread
* Re: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register
  2017-01-06  9:05     ` Haojian Zhuang
@ 2017-01-09  1:25       ` Tian, Feng
  0 siblings, 0 replies; 8+ messages in thread
From: Tian, Feng @ 2017-01-09  1:25 UTC (permalink / raw)
  To: Haojian Zhuang, leif.lindholm@linaro.org,
	ard.biesheuvel@linaro.org, edk2-devel@lists.01.org
  Cc: Tian, Feng

Haojian,

Please refer to below pic.

For example, we set UTRL as 0x10000, and we found 5th slot is free, then we should doorbell the 5th bit of UTRLDBR.

Your change will set UTRL as 0x100050,(assume each TRD uses 0x10bytes for easy understanding), then you have to set doorbell to 0.

Besides this, your fix also disobeys the UFS spec, which requests the UTRLBA is 1KB align.

[cid:image003.jpg@01D26A5A.4655E180]

Thanks
Feng

From: Haojian Zhuang [mailto:haojian.zhuang@linaro.org]
Sent: Friday, January 6, 2017 5:06 PM
To: Tian, Feng <feng.tian@intel.com>; leif.lindholm@linaro.org; ard.biesheuvel@linaro.org; edk2-devel@lists.01.org
Cc: Tian, Feng <feng.tian@intel.com>
Subject: RE: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register


Hi Feng,



I don’t understand why doorbell location should be updated too. If we don’t update UTRLBA & UTRLBAU for sending each UPIU packet, we have to extend the size of UTRD packet. Then we could avoid to create a new command buffer.



Best Regards

Haojian



From: Tian, Feng<mailto:feng.tian@intel.com>
Sent: 2017年1月6日 16:36
To: Haojian Zhuang<mailto:haojian.zhuang@linaro.org>; leif.lindholm@linaro.org<mailto:leif.lindholm@linaro.org>; ard.biesheuvel@linaro.org<mailto:ard.biesheuvel@linaro.org>; edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org>
Cc: Tian, Feng<mailto:feng.tian@intel.com>
Subject: RE: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register


Hi, Haojian

If the UTRLBA & UTRLBAU gets changed like below, the doorbell location also should be updated. So I don't suggest to update them.

Thanks
Feng

-----Original Message-----
From: Haojian Zhuang [mailto:haojian.zhuang@linaro.org]
Sent: Friday, January 6, 2017 2:52 PM
To: Tian, Feng <feng.tian@intel.com<mailto:feng.tian@intel.com>>; leif.lindholm@linaro.org<mailto:leif.lindholm@linaro.org>; ard.biesheuvel@linaro.org<mailto:ard.biesheuvel@linaro.org>; edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org<mailto:haojian.zhuang@linaro.org>>
Subject: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register

Although UfsInitTransferRequestList () assigns UTRLBA && UTRLBAU registers, UfsCreateScsiCommandDesc () creates a page of command buffer. It means that UTRLBA && UTRLBAU registers should be updated.

Always set UTRLBA && UTRLBAU registers before sending UPIU packet.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org<mailto:haojian.zhuang@linaro.org>>
---
 MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
index e556b62..5c256a9 100644
--- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
+++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c
@@ -937,6 +937,8 @@ UfsRwDeviceDesc (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd &
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) &
+ 0xffffffff);

   //
   // Check the transfer request result.
@@ -1060,6 +1062,8 @@ UfsRwAttributes (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd &
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) &
+ 0xffffffff);

   //
   // Check the transfer request result.
@@ -1184,6 +1188,8 @@ UfsRwFlags (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd &
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) &
+ 0xffffffff);

   //
   // Check the transfer request result.
@@ -1351,6 +1357,8 @@ UfsExecNopCmds (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)Trd &
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)Trd >> 32) &
+ 0xffffffff);

   //
   // Check the transfer request result.
@@ -1473,6 +1481,8 @@ UfsExecScsiCmds (
   if (EFI_ERROR (Status)) {
     return Status;
   }
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBA_OFFSET, (UINTN)TransReq->Trd &
+ 0xffffffff);
+  UfsMmioWrite32 (Private, UFS_HC_UTRLBAU_OFFSET, ((UINTN)TransReq->Trd
+ >> 32) & 0xffffffff);

   TransReq->CmdDescSize = TransReq->Trd->PrdtO * sizeof (UINT32) + TransReq->Trd->PrdtL * sizeof (UTP_TR_PRD);

--
2.7.4

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* Re: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register
@ 2017-01-10  6:09 haojian.zhuang
  2017-01-10  7:47 ` Tian, Feng
  0 siblings, 1 reply; 8+ messages in thread
From: haojian.zhuang @ 2017-01-10  6:09 UTC (permalink / raw)
  To: Tian, Feng, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org,
	edk2-devel@lists.01.org
  Cc: Tian, Feng

Hi Feng,

The problem is failing to send scsi command without this patch.

Without this patch, I’ll find there’s no response UPIU of command UPIU.

Best Regards
Haojian

From: Tian, Feng
Sent: 2017年1月9日 9:25
To: Haojian Zhuang; leif.lindholm@linaro.org; ard.biesheuvel@linaro.org; edk2-devel@lists.01.org
Cc: Tian, Feng
Subject: RE: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register



^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register
  2017-01-10  6:09 [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register haojian.zhuang
@ 2017-01-10  7:47 ` Tian, Feng
  2017-01-10  9:52   ` Haojian Zhuang
  0 siblings, 1 reply; 8+ messages in thread
From: Tian, Feng @ 2017-01-10  7:47 UTC (permalink / raw)
  To: haojian.zhuang@linaro.org, leif.lindholm@linaro.org,
	ard.biesheuvel@linaro.org, edk2-devel@lists.01.org
  Cc: Tian, Feng

Haojian

It's weird, I ever tested it with real h/w. it worked well.

As I have no UFS at hand, could you please test the old revision if EDKII UFS driver to see if it's regression?

And just like I said before, your fix has problem if selected slot is not zero.

Thanks
Feng

-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of haojian.zhuang@linaro.org
Sent: Tuesday, January 10, 2017 2:09 PM
To: Tian, Feng <feng.tian@intel.com>; leif.lindholm@linaro.org; ard.biesheuvel@linaro.org; edk2-devel@lists.01.org
Cc: Tian, Feng <feng.tian@intel.com>
Subject: Re: [edk2] [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register

Hi Feng,

The problem is failing to send scsi command without this patch.

Without this patch, I’ll find there’s no response UPIU of command UPIU.

Best Regards
Haojian

From: Tian, Feng
Sent: 2017年1月9日 9:25
To: Haojian Zhuang; leif.lindholm@linaro.org; ard.biesheuvel@linaro.org; edk2-devel@lists.01.org
Cc: Tian, Feng
Subject: RE: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register

_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register
  2017-01-10  7:47 ` Tian, Feng
@ 2017-01-10  9:52   ` Haojian Zhuang
  2017-01-11  1:00     ` Tian, Feng
  0 siblings, 1 reply; 8+ messages in thread
From: Haojian Zhuang @ 2017-01-10  9:52 UTC (permalink / raw)
  To: Tian, Feng, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org,
	edk2-devel@lists.01.org
  Cc: Tian, Feng

Hi Feng,



What’s the commit number of the old EDKII UFS driver?



Best Regards

Haojian



From: Tian, Feng<mailto:feng.tian@intel.com>
Sent: 2017年1月10日 15:47
To: haojian.zhuang@linaro.org<mailto:haojian.zhuang@linaro.org>; leif.lindholm@linaro.org<mailto:leif.lindholm@linaro.org>; ard.biesheuvel@linaro.org<mailto:ard.biesheuvel@linaro.org>; edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org>
Cc: Tian, Feng<mailto:feng.tian@intel.com>
Subject: RE: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register



Haojian

It's weird, I ever tested it with real h/w. it worked well.

As I have no UFS at hand, could you please test the old revision if EDKII UFS driver to see if it's regression?

And just like I said before, your fix has problem if selected slot is not zero.

Thanks
Feng

-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of haojian.zhuang@linaro.org
Sent: Tuesday, January 10, 2017 2:09 PM
To: Tian, Feng <feng.tian@intel.com>; leif.lindholm@linaro.org; ard.biesheuvel@linaro.org; edk2-devel@lists.01.org
Cc: Tian, Feng <feng.tian@intel.com>
Subject: Re: [edk2] [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register

Hi Feng,

The problem is failing to send scsi command without this patch.

Without this patch, I’ll find there’s no response UPIU of command UPIU.

Best Regards
Haojian

From: Tian, Feng
Sent: 2017年1月9日 9:25
To: Haojian Zhuang; leif.lindholm@linaro.org; ard.biesheuvel@linaro.org; edk2-devel@lists.01.org
Cc: Tian, Feng
Subject: RE: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register

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^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register
  2017-01-10  9:52   ` Haojian Zhuang
@ 2017-01-11  1:00     ` Tian, Feng
  0 siblings, 0 replies; 8+ messages in thread
From: Tian, Feng @ 2017-01-11  1:00 UTC (permalink / raw)
  To: Haojian Zhuang, leif.lindholm@linaro.org,
	ard.biesheuvel@linaro.org, edk2-devel@lists.01.org
  Cc: Tian, Feng

You can try 5966dd8ff2ef60095227523794ad07af675a3aeb of git repo or svn https://svn.code.sf.net/p/edk2/code/trunk/edk2@18088


Thanks
Feng

-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Haojian Zhuang
Sent: Tuesday, January 10, 2017 5:52 PM
To: Tian, Feng <feng.tian@intel.com>; leif.lindholm@linaro.org; ard.biesheuvel@linaro.org; edk2-devel@lists.01.org
Cc: Tian, Feng <feng.tian@intel.com>
Subject: Re: [edk2] [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register

Hi Feng,



What’s the commit number of the old EDKII UFS driver?



Best Regards

Haojian



From: Tian, Feng<mailto:feng.tian@intel.com>
Sent: 2017年1月10日 15:47
To: haojian.zhuang@linaro.org<mailto:haojian.zhuang@linaro.org>; leif.lindholm@linaro.org<mailto:leif.lindholm@linaro.org>; ard.biesheuvel@linaro.org<mailto:ard.biesheuvel@linaro.org>; edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org>
Cc: Tian, Feng<mailto:feng.tian@intel.com>
Subject: RE: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register



Haojian

It's weird, I ever tested it with real h/w. it worked well.

As I have no UFS at hand, could you please test the old revision if EDKII UFS driver to see if it's regression?

And just like I said before, your fix has problem if selected slot is not zero.

Thanks
Feng

-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of haojian.zhuang@linaro.org
Sent: Tuesday, January 10, 2017 2:09 PM
To: Tian, Feng <feng.tian@intel.com>; leif.lindholm@linaro.org; ard.biesheuvel@linaro.org; edk2-devel@lists.01.org
Cc: Tian, Feng <feng.tian@intel.com>
Subject: Re: [edk2] [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register

Hi Feng,

The problem is failing to send scsi command without this patch.

Without this patch, I’ll find there’s no response UPIU of command UPIU.

Best Regards
Haojian

From: Tian, Feng
Sent: 2017年1月9日 9:25
To: Haojian Zhuang; leif.lindholm@linaro.org; ard.biesheuvel@linaro.org; edk2-devel@lists.01.org
Cc: Tian, Feng
Subject: RE: [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register

_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel

^ permalink raw reply	[flat|nested] 8+ messages in thread
end of thread, other threads:[~2017-01-11  1:00 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-01-10  6:09 [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register haojian.zhuang
2017-01-10  7:47 ` Tian, Feng
2017-01-10  9:52   ` Haojian Zhuang
2017-01-11  1:00     ` Tian, Feng
  -- strict thread matches above, loose matches on Subject: below --
2017-01-06  6:52 [PATCH 0/9] enhance UFS Haojian Zhuang
2017-01-06  6:52 ` [PATCH 4/9] Ufs: fix to set UTRLBA and UTRLBAU register Haojian Zhuang
2017-01-06  8:36   ` Tian, Feng
2017-01-06  9:05     ` Haojian Zhuang
2017-01-09  1:25       ` Tian, Feng

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