From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id EFD3C21A04812 for ; Tue, 4 Apr 2017 20:24:00 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP; 04 Apr 2017 20:24:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,276,1486454400"; d="scan'208";a="951975701" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga003.jf.intel.com with ESMTP; 04 Apr 2017 20:23:56 -0700 Received: from fmsmsx111.amr.corp.intel.com (10.18.116.5) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 4 Apr 2017 20:22:09 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx111.amr.corp.intel.com (10.18.116.5) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 4 Apr 2017 20:22:09 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.193]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.217]) with mapi id 14.03.0319.002; Wed, 5 Apr 2017 11:22:07 +0800 From: "Tian, Feng" To: "Fan, Jeff" , "edk2-devel@lists.01.org" CC: "Yao, Jiewen" , "Kinney, Michael D" , "Tian, Feng" Thread-Topic: [PATCH] UefiCpuPkg/MpLib.c: Load microcode before mtrr sync per IA32 SDM Thread-Index: AQHSrbm13RipSh7Z1EeBOu6VY+NfU6G2HBrg Date: Wed, 5 Apr 2017 03:22:07 +0000 Message-ID: <7F1BAD85ADEA444D97065A60D2E97EE5699DE699@SHSMSX101.ccr.corp.intel.com> References: <20170405030651.17244-1-jeff.fan@intel.com> In-Reply-To: <20170405030651.17244-1-jeff.fan@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] UefiCpuPkg/MpLib.c: Load microcode before mtrr sync per IA32 SDM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Apr 2017 03:24:01 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Feng Tian Thanks Feng -----Original Message----- From: Fan, Jeff=20 Sent: Wednesday, April 5, 2017 11:07 AM To: edk2-devel@lists.01.org Cc: Yao, Jiewen ; Kinney, Michael D ; Tian, Feng Subject: [PATCH] UefiCpuPkg/MpLib.c: Load microcode before mtrr sync per IA= 32 SDM Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D453 Cc: Jiewen Yao Cc: Michael Kinney Cc: Feng Tian Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index bb93526..03d6c2d 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -382,13 +382,13 @@ ApInitializeSync ( =20 CpuMpData =3D (CPU_MP_DATA *) Buffer; // - // Sync BSP's MTRR table to AP - // - MtrrSetAllMtrrs (&CpuMpData->MtrrTable); - // // Load microcode on AP // MicrocodeDetect (CpuMpData); + // + // Sync BSP's MTRR table to AP + // + MtrrSetAllMtrrs (&CpuMpData->MtrrTable); } =20 /** --=20 2.9.3.windows.2