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From: Jeff Brasen <jbrasen@nvidia.com>
To: <edk2-devel@lists.01.org>
Cc: Edgar Handal <ehandal@nvidia.com>, Jeff Brasen <jbrasen@nvidia.com>
Subject: [PATCH] MdeModulePkg/SdMmcPciHcDxe: Use 16/32-bit IO widths
Date: Wed, 30 Jan 2019 16:58:40 -0700	[thread overview]
Message-ID: <7a0d5c95fdeee0e68f54c8a6a0fbe37c85e76774.1548892644.git.jbrasen@nvidia.com> (raw)

From: Edgar Handal <ehandal@nvidia.com>

Use 16-bit and 32-bit IO widths for SDMMC MMIO to prevent all register
accesses from being split up into 8-bit accesses.

The SDHCI specification states that the registers shall be accessable in
byte, word, and double word accesses.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
---
 MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 25 ++++++++++++++++++++----
 1 file changed, 21 insertions(+), 4 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
index 5aec8c6..82f4493 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
@@ -152,19 +152,36 @@ SdMmcHcRwMmio (
   )
 {
   EFI_STATUS                   Status;
+  EFI_PCI_IO_PROTOCOL_WIDTH    Width;
 
   if ((PciIo == NULL) || (Data == NULL))  {
     return EFI_INVALID_PARAMETER;
   }
 
-  if ((Count != 1) && (Count != 2) && (Count != 4) && (Count != 8)) {
-    return EFI_INVALID_PARAMETER;
+  switch (Count) {
+    case 1:
+      Width = EfiPciIoWidthUint8;
+      break;
+    case 2:
+      Width = EfiPciIoWidthUint16;
+      Count = 1;
+      break;
+    case 4:
+      Width = EfiPciIoWidthUint32;
+      Count = 1;
+      break;
+    case 8:
+      Width = EfiPciIoWidthUint32;
+      Count = 2;
+      break;
+    default:
+      return EFI_INVALID_PARAMETER;
   }
 
   if (Read) {
     Status = PciIo->Mem.Read (
                           PciIo,
-                          EfiPciIoWidthUint8,
+                          Width,
                           BarIndex,
                           (UINT64) Offset,
                           Count,
@@ -173,7 +190,7 @@ SdMmcHcRwMmio (
   } else {
     Status = PciIo->Mem.Write (
                           PciIo,
-                          EfiPciIoWidthUint8,
+                          Width,
                           BarIndex,
                           (UINT64) Offset,
                           Count,
-- 
2.7.4



             reply	other threads:[~2019-01-30 23:59 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-30 23:58 Jeff Brasen [this message]
2019-02-01  5:55 ` [PATCH] MdeModulePkg/SdMmcPciHcDxe: Use 16/32-bit IO widths Wu, Hao A
2019-02-01  7:12   ` Jeff Brasen
2019-02-01  7:54     ` Wu, Hao A
2019-02-01 17:52       ` Jeff Brasen
2019-02-18  2:49         ` Wu, Hao A
2019-02-03 12:39   ` Ard Biesheuvel
2019-02-20  1:19     ` Wu, Hao A
2019-02-20 11:04       ` Ard Biesheuvel

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