From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id C783CD80047 for ; Wed, 31 Jan 2024 12:06:31 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=9fVQL0HBeWfjKBvYPTYG59YlY8I/j1KptaNK3ahsz8A=; c=relaxed/simple; d=groups.io; h=Message-ID:Date:MIME-Version:Subject:From:To:Cc:Reply-To:References:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Language:Content-Type:Content-Transfer-Encoding; s=20140610; t=1706702790; v=1; b=OApunXlO+h1/MhwR1vslzpaQ65Hv5f5Hf1cva6p0q1UtedZERg62CsyR6sjhV+N7sM0o06fx XiZp7wf+AyNhMsiTggOScw/mpJ7n1+BDNUtkXNq64PboormVbOfdautr9pZMls2w708oR4NpBGG L3iYGEIP6DOwhOQcp1FoYbbQ= X-Received: by 127.0.0.2 with SMTP id fX5KYY7687511xs2NmuqwtQm; Wed, 31 Jan 2024 04:06:30 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web11.12317.1706702789918160336 for ; Wed, 31 Jan 2024 04:06:30 -0800 X-Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-154-rIqMFuy-MM2q7zDrqcuDog-1; Wed, 31 Jan 2024 07:06:22 -0500 X-MC-Unique: rIqMFuy-MM2q7zDrqcuDog-1 X-Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.rdu2.redhat.com [10.11.54.8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 3BC10848C03; Wed, 31 Jan 2024 12:06:22 +0000 (UTC) X-Received: from [10.39.192.35] (unknown [10.39.192.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C0B2DC1ED63; Wed, 31 Jan 2024 12:06:20 +0000 (UTC) Message-ID: <7b3177f0-9696-07e1-ad0e-040d5392b067@redhat.com> Date: Wed, 31 Jan 2024 13:06:19 +0100 MIME-Version: 1.0 Subject: Re: [edk2-devel] [PATCH v3 1/4] OvmfPkg/Sec: Setup MTRR early in the boot process. From: "Laszlo Ersek" To: Min Xu Cc: Michael Roth , Oliver Steffen , Jiewen Yao , Tom Lendacky , Ard Biesheuvel , Erdem Aktas , edk2-devel-groups-io , Gerd Hoffmann Reply-To: devel@edk2.groups.io,lersek@redhat.com References: <20240130130441.772484-1-kraxel@redhat.com> <20240130130441.772484-2-kraxel@redhat.com> In-Reply-To: X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: Svht5E2zbDKvOJpTP6srX1jzx7686176AA= Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=OApunXlO; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=redhat.com (policy=none) Hi Min, On 1/30/24 20:22, Laszlo Ersek wrote: > On 1/30/24 14:04, Gerd Hoffmann wrote: >> Specifically before running lzma uncompress of the main firmware volume. >> This is needed to make sure caching is enabled, otherwise the uncompress >> can be extremely slow. >> >> Adapt the ASSERTs and MTRR setup in PlatformInitLib to the changes. >> >> Background: Depending on virtual machine configuration kvm may uses EPT >> memory types to apply guest MTRR settings. In case MTRRs are disabled >> kvm will use the uncachable memory type for all mappings. The >> vmx_get_mt_mask() function in the linux kernel handles this and can be >> found here: >> >> https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/ar= ch/x86/kvm/vmx/vmx.c?h=3Dv6.7.1#n7580 >> >> In most VM configurations kvm uses MTRR_TYPE_WRBACK unconditionally. In >> case the VM has a mdev device assigned that is not the case though. >> >> Before commit e8aa4c6546ad ("UefiCpuPkg/ResetVector: Cache Disable >> should not be set by default in CR0") kvm also ended up using >> MTRR_TYPE_WRBACK due to KVM_X86_QUIRK_CD_NW_CLEARED. After that commit >> kvm evaluates guest mtrr settings, which why setting up MTRRs early is >> important now. >> >> Signed-off-by: Gerd Hoffmann >> --- >> OvmfPkg/IntelTdx/Sec/SecMain.c | 32 +++++++++++++++++++++ >> OvmfPkg/Library/PlatformInitLib/MemDetect.c | 10 +++---- >> OvmfPkg/Sec/SecMain.c | 32 +++++++++++++++++++++ >> 3 files changed, 69 insertions(+), 5 deletions(-) >> >> diff --git a/OvmfPkg/IntelTdx/Sec/SecMain.c b/OvmfPkg/IntelTdx/Sec/SecMa= in.c >> index 42a587adfa57..a218ca17a01a 100644 >> --- a/OvmfPkg/IntelTdx/Sec/SecMain.c >> +++ b/OvmfPkg/IntelTdx/Sec/SecMain.c >> @@ -27,6 +27,8 @@ >> #include >> #include >> #include >> +#include >> +#include >> =20 >> #define SEC_IDT_ENTRY_COUNT 34 >> =20 >> @@ -48,6 +50,31 @@ IA32_IDT_GATE_DESCRIPTOR mIdtEntryTemplate =3D { >> } >> }; >> =20 >> +// >> +// Enable MTRR early, set default type to write back. >> +// Needed to make sure caching is enabled, >> +// without this lzma decompress can be very slow. >> +// >> +STATIC >> +VOID >> +SecMtrrSetup ( >> + VOID >> + ) >> +{ >> + CPUID_VERSION_INFO_EDX Edx; >> + MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType; >> + >> + AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &Edx.Uint32); >> + if (!Edx.Bits.MTRR) { >> + return; >> + } >> + >> + DefType.Uint64 =3D AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE); >> + DefType.Bits.Type =3D 6; /* write back */ >> + DefType.Bits.E =3D 1; /* enable */ >> + AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, DefType.Uint64); >> +} >> + >> VOID >> EFIAPI >> SecCoreStartupWithStack ( >> @@ -204,6 +231,11 @@ SecCoreStartupWithStack ( >> InitializeApicTimer (0, MAX_UINT32, TRUE, 5); >> DisableApicTimerInterrupt (); >> =20 >> + // >> + // Initialize MTRR >> + // >> + SecMtrrSetup (); >> + >> PeilessStartup (&SecCoreData); >> =20 >> ASSERT (FALSE); >> diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Libra= ry/PlatformInitLib/MemDetect.c >> index f042517bb64a..e89f63eee054 100644 >> --- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c >> +++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c >> @@ -1082,18 +1082,18 @@ PlatformQemuInitializeRam ( >> MtrrGetAllMtrrs (&MtrrSettings); >> =20 >> // >> - // MTRRs disabled, fixed MTRRs disabled, default type is uncached >> + // See SecMtrrSetup(), default type should be write back >> // >> - ASSERT ((MtrrSettings.MtrrDefType & BIT11) =3D=3D 0); >> + ASSERT ((MtrrSettings.MtrrDefType & BIT11) !=3D 0); >> ASSERT ((MtrrSettings.MtrrDefType & BIT10) =3D=3D 0); >> - ASSERT ((MtrrSettings.MtrrDefType & 0xFF) =3D=3D 0); >> + ASSERT ((MtrrSettings.MtrrDefType & 0xFF) =3D=3D MTRR_CACHE_WRITE_B= ACK); >> =20 >> // >> // flip default type to writeback >> // >> - SetMem (&MtrrSettings.Fixed, sizeof MtrrSettings.Fixed, 0x06); >> + SetMem (&MtrrSettings.Fixed, sizeof MtrrSettings.Fixed, MTRR_CACHE_= WRITE_BACK); >> ZeroMem (&MtrrSettings.Variables, sizeof MtrrSettings.Variables); >> - MtrrSettings.MtrrDefType |=3D BIT11 | BIT10 | 6; >> + MtrrSettings.MtrrDefType |=3D BIT10; >> MtrrSetAllMtrrs (&MtrrSettings); >> =20 >> // >> diff --git a/OvmfPkg/Sec/SecMain.c b/OvmfPkg/Sec/SecMain.c >> index 31da5d0ace51..46c54f2984ff 100644 >> --- a/OvmfPkg/Sec/SecMain.c >> +++ b/OvmfPkg/Sec/SecMain.c >> @@ -30,6 +30,8 @@ >> #include >> #include >> #include >> +#include >> +#include >> #include "AmdSev.h" >> =20 >> #define SEC_IDT_ENTRY_COUNT 34 >> @@ -744,6 +746,31 @@ FindAndReportEntryPoints ( >> return; >> } >> =20 >> +// >> +// Enable MTRR early, set default type to write back. >> +// Needed to make sure caching is enabled, >> +// without this lzma decompress can be very slow. >> +// >> +STATIC >> +VOID >> +SecMtrrSetup ( >> + VOID >> + ) >> +{ >> + CPUID_VERSION_INFO_EDX Edx; >> + MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType; >> + >> + AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &Edx.Uint32); >> + if (!Edx.Bits.MTRR) { >> + return; >> + } >> + >> + DefType.Uint64 =3D AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE); >> + DefType.Bits.Type =3D 6; /* write back */ >> + DefType.Bits.E =3D 1; /* enable */ >> + AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, DefType.Uint64); >> +} >> + >> VOID >> EFIAPI >> SecCoreStartupWithStack ( >> @@ -942,6 +969,11 @@ SecCoreStartupWithStack ( >> InitializeApicTimer (0, MAX_UINT32, TRUE, 5); >> DisableApicTimerInterrupt (); >> =20 >> + // >> + // Initialize MTRR >> + // >> + SecMtrrSetup (); >> + >> // >> // Initialize Debug Agent to support source level debug in SEC/PEI ph= ases before memory ready. >> // >=20 > Cannot comment on the "OvmfPkg/IntelTdx/Sec/SecMain.c" source file > changes, but for the rest: Can you confirm (a) this patch is OK for "OvmfPkg/IntelTdx/Sec/SecMain.c", and (b) this series fixes the slowdown you had encountered? (that's what's left before we can merge this series) Thanks Laszlo >=20 > Reviewed-by: Laszlo Ersek >=20 >=20 >=20 >=20 >=20 >=20 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#114893): https://edk2.groups.io/g/devel/message/114893 Mute This Topic: https://groups.io/mt/104052591/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/12367111/7686176/19134562= 12/xyzzy [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-