Re: [edk2-devel] [PATCH] ArmPkg/ProcessorSubClassDxe: Limit CoreCount to 0xFF

["Sami Mujawar" <sami.mujawar@arm.com>]

Hi Jeff,

Thank you for this patch.

The changes in this patch look good to me. However, a similar change 
also applies to the ThreadCount & ThreadCount2 fields.

Although, this patch only talks about CoreCount, would it be possible to 
update this or submit a new patch to fix the ThreadCount also, please?

In either case,

Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>

Regards,

Sami Mujawar


On 30/01/2024 08:22 pm, Jeff Brasen wrote:
>   The CoreCount and EnabledCore counts should be set to 0xFF if value is
>   greater than 255 per the SMBIOS specification.
>
> Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
> ---
>   .../ProcessorSubClassDxe/ProcessorSubClass.c  | 37 +++++++++++++------
>   1 file changed, 25 insertions(+), 12 deletions(-)
>
> diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> index 9050588500..921a1d0aaa 100644
> --- a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> +++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> @@ -702,19 +702,32 @@ AddSmbiosProcessorTypeTable (
>   
>     LegacyVoltage = (UINT8 *)&Type4Record->Voltage;
>   
> -  *LegacyVoltage                 = MiscProcessorData.Voltage;
> -  Type4Record->CurrentSpeed      = MiscProcessorData.CurrentSpeed;
> -  Type4Record->MaxSpeed          = MiscProcessorData.MaxSpeed;
> -  Type4Record->Status            = ProcessorStatus.Data;
> -  Type4Record->L1CacheHandle     = L1CacheHandle;
> -  Type4Record->L2CacheHandle     = L2CacheHandle;
> -  Type4Record->L3CacheHandle     = L3CacheHandle;
> -  Type4Record->CoreCount         = MiscProcessorData.CoreCount;
> -  Type4Record->CoreCount2        = MiscProcessorData.CoreCount;
> -  Type4Record->EnabledCoreCount  = MiscProcessorData.CoresEnabled;
> +  *LegacyVoltage             = MiscProcessorData.Voltage;
> +  Type4Record->CurrentSpeed  = MiscProcessorData.CurrentSpeed;
> +  Type4Record->MaxSpeed      = MiscProcessorData.MaxSpeed;
> +  Type4Record->Status        = ProcessorStatus.Data;
> +  Type4Record->L1CacheHandle = L1CacheHandle;
> +  Type4Record->L2CacheHandle = L2CacheHandle;
> +  Type4Record->L3CacheHandle = L3CacheHandle;
> +
> +  if (MiscProcessorData.CoreCount > 255) {
> +    Type4Record->CoreCount = 0xFF;
> +  } else {
> +    Type4Record->CoreCount = MiscProcessorData.CoreCount;
> +  }
> +
> +  Type4Record->CoreCount2 = MiscProcessorData.CoreCount;
> +
> +  if (MiscProcessorData.CoresEnabled > 255) {
> +    Type4Record->EnabledCoreCount = 0xFF;
> +  } else {
> +    Type4Record->EnabledCoreCount = MiscProcessorData.CoresEnabled;
> +  }
> +
>     Type4Record->EnabledCoreCount2 = MiscProcessorData.CoresEnabled;
> -  Type4Record->ThreadCount       = MiscProcessorData.ThreadCount;
> -  Type4Record->ThreadCount2      = MiscProcessorData.ThreadCount;
> +
> +  Type4Record->ThreadCount  = MiscProcessorData.ThreadCount;
> +  Type4Record->ThreadCount2 = MiscProcessorData.ThreadCount;

[SAMI] According to SMBIOS specification 3.7, section 7.8.5 states that 
the ThreadCount also follows a similar approact to Core Count and Core 
Count 2 fields, see Table 28.

[/SAMI]

>   
>     Type4Record->CurrentSpeed  = GetCpuFrequency (ProcessorIndex);
>     Type4Record->ExternalClock =


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