* [edk2-devel] [PATCH] ArmPkg/ProcessorSubClassDxe: Limit CoreCount to 0xFF
@ 2024-01-30 20:22 Jeff Brasen via groups.io
2024-02-06 11:39 ` Sami Mujawar
0 siblings, 1 reply; 2+ messages in thread
From: Jeff Brasen via groups.io @ 2024-01-30 20:22 UTC (permalink / raw)
To: devel; +Cc: ardb+tianocore, quic_llindhol, sami.mujawar, Jeff Brasen
The CoreCount and EnabledCore counts should be set to 0xFF if value is
greater than 255 per the SMBIOS specification.
Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
---
.../ProcessorSubClassDxe/ProcessorSubClass.c | 37 +++++++++++++------
1 file changed, 25 insertions(+), 12 deletions(-)
diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
index 9050588500..921a1d0aaa 100644
--- a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
+++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
@@ -702,19 +702,32 @@ AddSmbiosProcessorTypeTable (
LegacyVoltage = (UINT8 *)&Type4Record->Voltage;
- *LegacyVoltage = MiscProcessorData.Voltage;
- Type4Record->CurrentSpeed = MiscProcessorData.CurrentSpeed;
- Type4Record->MaxSpeed = MiscProcessorData.MaxSpeed;
- Type4Record->Status = ProcessorStatus.Data;
- Type4Record->L1CacheHandle = L1CacheHandle;
- Type4Record->L2CacheHandle = L2CacheHandle;
- Type4Record->L3CacheHandle = L3CacheHandle;
- Type4Record->CoreCount = MiscProcessorData.CoreCount;
- Type4Record->CoreCount2 = MiscProcessorData.CoreCount;
- Type4Record->EnabledCoreCount = MiscProcessorData.CoresEnabled;
+ *LegacyVoltage = MiscProcessorData.Voltage;
+ Type4Record->CurrentSpeed = MiscProcessorData.CurrentSpeed;
+ Type4Record->MaxSpeed = MiscProcessorData.MaxSpeed;
+ Type4Record->Status = ProcessorStatus.Data;
+ Type4Record->L1CacheHandle = L1CacheHandle;
+ Type4Record->L2CacheHandle = L2CacheHandle;
+ Type4Record->L3CacheHandle = L3CacheHandle;
+
+ if (MiscProcessorData.CoreCount > 255) {
+ Type4Record->CoreCount = 0xFF;
+ } else {
+ Type4Record->CoreCount = MiscProcessorData.CoreCount;
+ }
+
+ Type4Record->CoreCount2 = MiscProcessorData.CoreCount;
+
+ if (MiscProcessorData.CoresEnabled > 255) {
+ Type4Record->EnabledCoreCount = 0xFF;
+ } else {
+ Type4Record->EnabledCoreCount = MiscProcessorData.CoresEnabled;
+ }
+
Type4Record->EnabledCoreCount2 = MiscProcessorData.CoresEnabled;
- Type4Record->ThreadCount = MiscProcessorData.ThreadCount;
- Type4Record->ThreadCount2 = MiscProcessorData.ThreadCount;
+
+ Type4Record->ThreadCount = MiscProcessorData.ThreadCount;
+ Type4Record->ThreadCount2 = MiscProcessorData.ThreadCount;
Type4Record->CurrentSpeed = GetCpuFrequency (ProcessorIndex);
Type4Record->ExternalClock =
--
2.34.1
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#114910): https://edk2.groups.io/g/devel/message/114910
Mute This Topic: https://groups.io/mt/104078446/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [edk2-devel] [PATCH] ArmPkg/ProcessorSubClassDxe: Limit CoreCount to 0xFF
2024-01-30 20:22 [edk2-devel] [PATCH] ArmPkg/ProcessorSubClassDxe: Limit CoreCount to 0xFF Jeff Brasen via groups.io
@ 2024-02-06 11:39 ` Sami Mujawar
0 siblings, 0 replies; 2+ messages in thread
From: Sami Mujawar @ 2024-02-06 11:39 UTC (permalink / raw)
To: Jeff Brasen, devel; +Cc: ardb+tianocore, quic_llindhol, nd@arm.com
Hi Jeff,
Thank you for this patch.
The changes in this patch look good to me. However, a similar change
also applies to the ThreadCount & ThreadCount2 fields.
Although, this patch only talks about CoreCount, would it be possible to
update this or submit a new patch to fix the ThreadCount also, please?
In either case,
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Regards,
Sami Mujawar
On 30/01/2024 08:22 pm, Jeff Brasen wrote:
> The CoreCount and EnabledCore counts should be set to 0xFF if value is
> greater than 255 per the SMBIOS specification.
>
> Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
> ---
> .../ProcessorSubClassDxe/ProcessorSubClass.c | 37 +++++++++++++------
> 1 file changed, 25 insertions(+), 12 deletions(-)
>
> diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> index 9050588500..921a1d0aaa 100644
> --- a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> +++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> @@ -702,19 +702,32 @@ AddSmbiosProcessorTypeTable (
>
> LegacyVoltage = (UINT8 *)&Type4Record->Voltage;
>
> - *LegacyVoltage = MiscProcessorData.Voltage;
> - Type4Record->CurrentSpeed = MiscProcessorData.CurrentSpeed;
> - Type4Record->MaxSpeed = MiscProcessorData.MaxSpeed;
> - Type4Record->Status = ProcessorStatus.Data;
> - Type4Record->L1CacheHandle = L1CacheHandle;
> - Type4Record->L2CacheHandle = L2CacheHandle;
> - Type4Record->L3CacheHandle = L3CacheHandle;
> - Type4Record->CoreCount = MiscProcessorData.CoreCount;
> - Type4Record->CoreCount2 = MiscProcessorData.CoreCount;
> - Type4Record->EnabledCoreCount = MiscProcessorData.CoresEnabled;
> + *LegacyVoltage = MiscProcessorData.Voltage;
> + Type4Record->CurrentSpeed = MiscProcessorData.CurrentSpeed;
> + Type4Record->MaxSpeed = MiscProcessorData.MaxSpeed;
> + Type4Record->Status = ProcessorStatus.Data;
> + Type4Record->L1CacheHandle = L1CacheHandle;
> + Type4Record->L2CacheHandle = L2CacheHandle;
> + Type4Record->L3CacheHandle = L3CacheHandle;
> +
> + if (MiscProcessorData.CoreCount > 255) {
> + Type4Record->CoreCount = 0xFF;
> + } else {
> + Type4Record->CoreCount = MiscProcessorData.CoreCount;
> + }
> +
> + Type4Record->CoreCount2 = MiscProcessorData.CoreCount;
> +
> + if (MiscProcessorData.CoresEnabled > 255) {
> + Type4Record->EnabledCoreCount = 0xFF;
> + } else {
> + Type4Record->EnabledCoreCount = MiscProcessorData.CoresEnabled;
> + }
> +
> Type4Record->EnabledCoreCount2 = MiscProcessorData.CoresEnabled;
> - Type4Record->ThreadCount = MiscProcessorData.ThreadCount;
> - Type4Record->ThreadCount2 = MiscProcessorData.ThreadCount;
> +
> + Type4Record->ThreadCount = MiscProcessorData.ThreadCount;
> + Type4Record->ThreadCount2 = MiscProcessorData.ThreadCount;
[SAMI] According to SMBIOS specification 3.7, section 7.8.5 states that
the ThreadCount also follows a similar approact to Core Count and Core
Count 2 fields, see Table 28.
[/SAMI]
>
> Type4Record->CurrentSpeed = GetCpuFrequency (ProcessorIndex);
> Type4Record->ExternalClock =
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#115156): https://edk2.groups.io/g/devel/message/115156
Mute This Topic: https://groups.io/mt/104078446/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2024-02-06 11:39 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-01-30 20:22 [edk2-devel] [PATCH] ArmPkg/ProcessorSubClassDxe: Limit CoreCount to 0xFF Jeff Brasen via groups.io
2024-02-06 11:39 ` Sami Mujawar
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox