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Subject: Re: [PATCH v4 6/6] Platform/RaspberryPi: Trivial whitespace cleanup
To: Jeremy Linton <jeremy.linton@arm.com>, devel@edk2.groups.io
Cc: Leif Lindholm <leif@nuviainc.com>, Pete Batard <pete@akeo.ie>,
 Andrei Warkentin <awarkentin@vmware.com>,
 Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
References: <20200831172549.24079-1-jeremy.linton@arm.com>
 <20200831172549.24079-7-jeremy.linton@arm.com>
From: "Ard Biesheuvel" <ard.biesheuvel@arm.com>
Message-ID: <7d6c81cb-8d2e-2991-d585-300df9f00a13@arm.com>
Date: Tue, 1 Sep 2020 14:39:14 +0300
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On 8/31/20 7:25 PM, Jeremy Linton wrote:
> Pete's review pointed out some whitespace issues in the
> context of a previous patch. Since there are a number of
> similar errors in the file lets fix them separately.
> 
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Pete Batard <pete@akeo.ie>
> Cc: Andrei Warkentin <awarkentin@vmware.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
> Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
> Reviewed-by: Pete Batard <@pbatard>
> ---
>   Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 24 +++++++++++-----------
>   1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
> index e8f964a329..4ed294cdfe 100644
> --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
> +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
> @@ -209,9 +209,9 @@ SetupVariables (
>     }
>   
>     Size = sizeof (UINT32);
> -  Status = gRT->GetVariable(L"CustomCpuClock",
> -                            &gConfigDxeFormSetGuid,
> -                            NULL, &Size, &Var32);
> +  Status = gRT->GetVariable (L"CustomCpuClock",
> +                             &gConfigDxeFormSetGuid,
> +                             NULL, &Size, &Var32);
>     if (EFI_ERROR (Status)) {
>       Status = PcdSet32S (PcdCustomCpuClock, PcdGet32 (PcdCustomCpuClock));
>       ASSERT_EFI_ERROR (Status);
> @@ -266,7 +266,7 @@ SetupVariables (
>   
>   
>     Size = sizeof (AssetTagVar);
> -  Status = gRT->GetVariable(L"AssetTag",
> +  Status = gRT->GetVariable (L"AssetTag",
>                     &gConfigDxeFormSetGuid,
>                     NULL, &Size, AssetTagVar);
>   
> @@ -275,7 +275,7 @@ SetupVariables (
>                       L"AssetTag",
>                       &gConfigDxeFormSetGuid,
>                       EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
> -                    sizeof(AssetTagVar),
> +                    sizeof (AssetTagVar),
>                       AssetTagVar
>                       );
>     }
> @@ -441,9 +441,9 @@ ApplyVariables (
>        * spaces. SystemMemorySizeBelow4GB tracks the maximum memory below 4GB
>        * line, factoring in the limit imposed by the SoC register range.
>        */
> -    SystemMemorySizeBelow4GB = MIN(SystemMemorySize, 4UL * SIZE_1GB);
> -    SystemMemorySizeBelow4GB = MIN(SystemMemorySizeBelow4GB, BCM2836_SOC_REGISTERS);
> -    SystemMemorySizeBelow4GB = MIN(SystemMemorySizeBelow4GB, BCM2711_SOC_REGISTERS);
> +    SystemMemorySizeBelow4GB = MIN (SystemMemorySize, 4UL * SIZE_1GB);
> +    SystemMemorySizeBelow4GB = MIN (SystemMemorySizeBelow4GB, BCM2836_SOC_REGISTERS);
> +    SystemMemorySizeBelow4GB = MIN (SystemMemorySizeBelow4GB, BCM2711_SOC_REGISTERS);
>   
>       ASSERT (SystemMemorySizeBelow4GB > 3UL * SIZE_1GB);
>   
> @@ -536,14 +536,14 @@ ApplyVariables (
>         /*
>          * SD card pins go to Arasan.
>          */
> -      MmioWrite32((GPIO_BASE_ADDRESS + 0xD0),
> -                  MmioRead32(GPIO_BASE_ADDRESS + 0xD0) | 0x2);
> +      MmioWrite32 ((GPIO_BASE_ADDRESS + 0xD0),
> +                  MmioRead32 (GPIO_BASE_ADDRESS + 0xD0) | 0x2);
>       } else {
>         /*
>          * SD card pins back to eMMC2.
>          */
> -      MmioWrite32((GPIO_BASE_ADDRESS + 0xD0),
> -                  MmioRead32(GPIO_BASE_ADDRESS + 0xD0) & ~0x2);
> +      MmioWrite32 ((GPIO_BASE_ADDRESS + 0xD0),
> +                  MmioRead32 (GPIO_BASE_ADDRESS + 0xD0) & ~0x2);

Anyone mind if I replace these with MmioOr32 / MmioAnd32 ?


>         /*
>          * WiFi back to Arasan.
>          */
>