From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-1.mimecast.com (us-smtp-1.mimecast.com [205.139.110.120]) by mx.groups.io with SMTP id smtpd.web09.2224.1575406999092602999 for ; Tue, 03 Dec 2019 13:03:19 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=a7nR9uxU; spf=pass (domain: redhat.com, ip: 205.139.110.120, mailfrom: lersek@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1575406998; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QXrfCDxd1RFKgYbdXJyW6XWqzuptkQUKTE/wK7OrU4E=; b=a7nR9uxUzs6y3F/ZOTp1oLxQ4NLy1HMmAH1v8X+E6bdz45FzTMeWifQGVmniBXUebma0V8 HbWURJJ0BcQGlufyMNdvjNb+WCEYr6JX85fA1RtvZSgIBa35RuGGI9shbKo9XmPRO3hJ8V yS04+ygBOmSanijtii+M0afYLG2Yd2M= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-312-oUHZHscINPW4QGxsVbUAKA-1; Tue, 03 Dec 2019 16:03:17 -0500 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B1ACD1005516; Tue, 3 Dec 2019 21:03:15 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-117-183.ams2.redhat.com [10.36.117.183]) by smtp.corp.redhat.com (Postfix) with ESMTP id 97758600C8; Tue, 3 Dec 2019 21:03:11 +0000 (UTC) Subject: Re: [PATCH 77/79] UefiCpuPkg/CpuDxe: Fix few typos To: Philippe Mathieu-Daude , devel@edk2.groups.io Cc: Antoine Coeur , Eric Dong , Ray Ni References: <20191203161602.15969-1-philmd@redhat.com> <20191203161602.15969-78-philmd@redhat.com> From: "Laszlo Ersek" Message-ID: <813f0a51-a1ee-b4e2-9150-2cfe0f5ce87f@redhat.com> Date: Tue, 3 Dec 2019 22:03:10 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20191203161602.15969-78-philmd@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-MC-Unique: oUHZHscINPW4QGxsVbUAKA-1 X-Mimecast-Spam-Score: 0 Content-Language: en-US Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit On 12/03/19 17:16, Philippe Mathieu-Daude wrote: > From: Antoine Coeur > > Fix few typos in comments and documentation. > > Cc: Eric Dong > Cc: Ray Ni > Cc: Laszlo Ersek > Reviewed-by: Philippe Mathieu-Daude > Signed-off-by: Philippe Mathieu-Daude > --- > UefiCpuPkg/CpuDxe/CpuDxe.h | 2 +- > UefiCpuPkg/CpuDxe/CpuGdt.h | 2 +- > UefiCpuPkg/CpuDxe/CpuMp.h | 4 ++-- > UefiCpuPkg/CpuDxe/CpuPageTable.h | 2 +- > UefiCpuPkg/CpuDxe/CpuDxe.c | 8 ++++---- > UefiCpuPkg/CpuDxe/CpuGdt.c | 2 +- > UefiCpuPkg/CpuDxe/CpuMp.c | 4 ++-- > UefiCpuPkg/CpuDxe/CpuPageTable.c | 6 +++--- > 8 files changed, 15 insertions(+), 15 deletions(-) > > diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.h b/UefiCpuPkg/CpuDxe/CpuDxe.h > index a6762f1a0b78..9299eaa63d8a 100644 > --- a/UefiCpuPkg/CpuDxe/CpuDxe.h > +++ b/UefiCpuPkg/CpuDxe/CpuDxe.h > @@ -208,7 +208,7 @@ CpuGetTimerValue ( > ); > > /** > - Set memory cacheability attributes for given range of memeory. > + Set memory cacheability attributes for given range of memory. > > @param This Protocol instance structure > @param BaseAddress Specifies the start address of the > diff --git a/UefiCpuPkg/CpuDxe/CpuGdt.h b/UefiCpuPkg/CpuDxe/CpuGdt.h > index e5c36f37b96a..3a0210b2f172 100644 > --- a/UefiCpuPkg/CpuDxe/CpuGdt.h > +++ b/UefiCpuPkg/CpuDxe/CpuGdt.h > @@ -1,5 +1,5 @@ > /** @file > - C based implemention of IA32 interrupt handling only > + C based implementation of IA32 interrupt handling only > requiring a minimal assembly interrupt entry point. > > Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
> diff --git a/UefiCpuPkg/CpuDxe/CpuMp.h b/UefiCpuPkg/CpuDxe/CpuMp.h > index e7e115fc8f3d..4ee171d8c491 100644 > --- a/UefiCpuPkg/CpuDxe/CpuMp.h > +++ b/UefiCpuPkg/CpuDxe/CpuMp.h > @@ -147,7 +147,7 @@ GetProcessorInfo ( > and releases the BSP to continue with other tasks. > -# The caller can use the CheckEvent() and WaitForEvent() services to check > the state of the WaitEvent created in step 1. > - -# When the APs complete their task or TimeoutInMicroSecondss expires, the MP > + -# When the APs complete their task or TimeoutInMicroSeconds expires, the MP > Service signals WaitEvent by calling the EFI SignalEvent() function. If > FailedCpuList is not NULL, its content is available when WaitEvent is > signaled. If all APs returned from Procedure prior to the timeout, then > @@ -254,7 +254,7 @@ StartupAllAPs ( > This function is used to dispatch one enabled AP to the function specified by > Procedure passing in the argument specified by ProcedureArgument. If WaitEvent > is NULL, execution is in blocking mode. The BSP waits until the AP finishes or > - TimeoutInMicroSecondss expires. Otherwise, execution is in non-blocking mode. > + TimeoutInMicroSeconds expires. Otherwise, execution is in non-blocking mode. > BSP proceeds to the next task without waiting for the AP. If a non-blocking mode > is requested after the UEFI Event EFI_EVENT_GROUP_READY_TO_BOOT is signaled, > then EFI_UNSUPPORTED must be returned. > diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.h b/UefiCpuPkg/CpuDxe/CpuPageTable.h > index bad6784bcb51..0b2a02a2be5c 100644 > --- a/UefiCpuPkg/CpuDxe/CpuPageTable.h > +++ b/UefiCpuPkg/CpuDxe/CpuPageTable.h > @@ -78,7 +78,7 @@ VOID * > > Caller should make sure BaseAddress and Length is at page boundary. > > - Caller need guarentee the TPL <= TPL_NOTIFY, if there is split page request. > + Caller need guarantee the TPL <= TPL_NOTIFY, if there is split page request. > > @param PagingContext The paging context. NULL means get page table from current CPU context. > @param BaseAddress The physical address that is the start address of a memory region. > diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c > index 7d7270e10b4a..a571fc3b1750 100644 > --- a/UefiCpuPkg/CpuDxe/CpuDxe.c > +++ b/UefiCpuPkg/CpuDxe/CpuDxe.c > @@ -393,7 +393,7 @@ CpuSetMemoryAttributes ( > > // > // If this function is called because GCD SetMemorySpaceAttributes () is called > - // by RefreshGcdMemoryAttributes (), then we are just synchronzing GCD memory > + // by RefreshGcdMemoryAttributes (), then we are just synchronizing GCD memory > // map with MTRR values. So there is no need to modify MTRRs, just return immediately > // to avoid unnecessary computing. > // > @@ -456,7 +456,7 @@ CpuSetMemoryAttributes ( > CurrentCacheType = MtrrGetMemoryAttribute(BaseAddress); > if (CurrentCacheType != CacheType) { > // > - // call MTRR libary function > + // call MTRR library function > // > Status = MtrrSetMemoryAttribute ( > BaseAddress, > @@ -831,7 +831,7 @@ RefreshMemoryAttributesFromMtrr ( > Attributes = CurrentAttributes; > } else { > // > - // If fixed MTRR attribute changed, then set memory attribute for previous atrribute > + // If fixed MTRR attribute changed, then set memory attribute for previous attribute > // > if (CurrentAttributes != Attributes) { > SetGcdMemorySpaceAttributes ( > @@ -1045,7 +1045,7 @@ IntersectMemoryDescriptor ( > @param Length Length of the MMIO space. > @param Capabilities Capabilities of the MMIO space. > > - @retval EFI_SUCCES The MMIO space was added successfully. > + @retval EFI_SUCCESS The MMIO space was added successfully. > **/ > EFI_STATUS > AddMemoryMappedIoSpace ( > diff --git a/UefiCpuPkg/CpuDxe/CpuGdt.c b/UefiCpuPkg/CpuDxe/CpuGdt.c > index 87fd6955f24b..64efadeba601 100644 > --- a/UefiCpuPkg/CpuDxe/CpuGdt.c > +++ b/UefiCpuPkg/CpuDxe/CpuGdt.c > @@ -1,5 +1,5 @@ > /** @file > - C based implemention of IA32 interrupt handling only > + C based implementation of IA32 interrupt handling only > requiring a minimal assembly interrupt entry point. > > Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
> diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c > index de6c6a5c330c..60ede38df4fc 100644 > --- a/UefiCpuPkg/CpuDxe/CpuMp.c > +++ b/UefiCpuPkg/CpuDxe/CpuMp.c > @@ -164,7 +164,7 @@ GetProcessorInfo ( > and releases the BSP to continue with other tasks. > -# The caller can use the CheckEvent() and WaitForEvent() services to check > the state of the WaitEvent created in step 1. > - -# When the APs complete their task or TimeoutInMicroSecondss expires, the MP > + -# When the APs complete their task or TimeoutInMicroSeconds expires, the MP > Service signals WaitEvent by calling the EFI SignalEvent() function. If > FailedCpuList is not NULL, its content is available when WaitEvent is > signaled. If all APs returned from Procedure prior to the timeout, then > @@ -281,7 +281,7 @@ StartupAllAPs ( > This function is used to dispatch one enabled AP to the function specified by > Procedure passing in the argument specified by ProcedureArgument. If WaitEvent > is NULL, execution is in blocking mode. The BSP waits until the AP finishes or > - TimeoutInMicroSecondss expires. Otherwise, execution is in non-blocking mode. > + TimeoutInMicroSeconds expires. Otherwise, execution is in non-blocking mode. > BSP proceeds to the next task without waiting for the AP. If a non-blocking mode > is requested after the UEFI Event EFI_EVENT_GROUP_READY_TO_BOOT is signaled, > then EFI_UNSUPPORTED must be returned. > diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c > index cb121771425a..0a02cb3f6b7e 100644 > --- a/UefiCpuPkg/CpuDxe/CpuPageTable.c > +++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c > @@ -776,7 +776,7 @@ ConvertMemoryPageAttributes ( > } > > // > - // Below logic is to check 2M/4K page to make sure we donot waist memory. > + // Below logic is to check 2M/4K page to make sure we do not waste memory. > // > Status = EFI_SUCCESS; > while (Length != 0) { > @@ -838,7 +838,7 @@ Done: > > Caller should make sure BaseAddress and Length is at page boundary. > > - Caller need guarentee the TPL <= TPL_NOTIFY, if there is split page request. > + Caller need guarantee the TPL <= TPL_NOTIFY, if there is split page request. > > @param[in] PagingContext The paging context. NULL means get page table from current CPU context. > @param[in] BaseAddress The physical address that is the start address of a memory region. > @@ -969,7 +969,7 @@ RefreshGcdMemoryAttributesFromPaging ( > ); > if (EFI_ERROR (Status)) { > // > - // If we cannot udpate the capabilities, we cannot update its > + // If we cannot update the capabilities, we cannot update its > // attributes either. So just simply skip current block of memory. > // > DEBUG (( > Reviewed-by: Laszlo Ersek