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Subject: Re: [edk2-devel] [edk2-platforms][PATCH v1 1/2] Platform/RaspberryPi: Add support for PWM1 in ACPI
To: devel@edk2.groups.io, mariobalanica02@gmail.com
Cc: ardb+tianocore@kernel.org, leif@nuviainc.com, pete@akeo.ie,
 samer.el-haj-mahmoud@arm.com, sunny.wang@arm.com
References: <20211105203436.997-1-mariobalanica02@gmail.com>
From: "Jeremy Linton" <jeremy.linton@arm.com>
In-Reply-To: <20211105203436.997-1-mariobalanica02@gmail.com>
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Hi,

First thanks for posting this!

I ended up tweaking this a bit to get it to apply, because something in=20
my email chain mangled it more than usual. Hopefully others aren't=20
seeing this.

Anyway see below..

On 11/5/21 15:34, Mario B=C4=83l=C4=83nic=C4=83 via groups.io wrote:
> Also fix PWM0 on the Raspberry Pi 4, but we can't expose both yet.
Why is that? The rpi4 needs both PWM devices to output stereo right? So=20
with this patch is still mono?
>=20
> Signed-off-by: Mario B=C4=83l=C4=83nic=C4=83 <mariobalanica02@gmail.com=
>
> ---
>   Platform/RaspberryPi/AcpiTables/AcpiTables.h                   | 10 +=
+-
>   Platform/RaspberryPi/AcpiTables/Dsdt.asl                       | 34 +=
+++++---
>   Platform/RaspberryPi/AcpiTables/GpuDevs.asl                    | 78 +=
+++++++++++++++----
>   Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h    | 13 +=
+++
>   Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h | 26 +=
++----
>   5 files changed, 122 insertions(+), 39 deletions(-)
>=20
> diff --git a/Platform/RaspberryPi/AcpiTables/AcpiTables.h b/Platform/Ra=
spberryPi/AcpiTables/AcpiTables.h
> index 37e2a6bdf409..05da967803af 100644
> --- a/Platform/RaspberryPi/AcpiTables/AcpiTables.h
> +++ b/Platform/RaspberryPi/AcpiTables/AcpiTables.h
> @@ -24,6 +24,11 @@
>       CreateDwordField (^BufName, ^MemName._BAS, VarName)          \
>=20
>       Add (BCM2836_SOC_REGISTERS, Offset, VarName)
>=20
>  =20
>=20
> +// Same as above, but without the base address.
>=20
> +#define MEMORY32SET(BufName, MemName, VarName, Address)          \
>=20
> +    CreateDwordField (^BufName, ^MemName._BAS, VarName)          \
>=20
> +    Store(Address, VarName)
>=20
> +
>=20
>   #define EFI_ACPI_OEM_ID                       {'R','P','I','F','D','N=
'}
>=20
>   #if (RPI_MODEL =3D=3D 3)
>=20
>   #define EFI_ACPI_OEM_TABLE_ID                 SIGNATURE_64 ('R','P','=
I','3',' ',' ',' ',' ')
>=20
> @@ -113,7 +118,7 @@ typedef struct
>   //-------------------------------------------------------------------=
-----
>=20
>   #if (RPI_MODEL =3D=3D 3)
>=20
>   #define BCM2836_V3D_BUS_INTERRUPT               0x2A
>=20
> -#define BCM2836_DMA_INTERRUPT                   0x3B
>=20
> +#define BCM2836_DMA5_INTERRUPT                  0x35
>=20
>   #define BCM2836_SPI1_INTERRUPT                  0x3D
>=20
>   #define BCM2836_SPI2_INTERRUPT                  0x3D
>=20
>   #define BCM2836_HVS_INTERRUPT                   0x41
>=20
> @@ -138,7 +143,8 @@ typedef struct
>   #define BCM2836_PL011_UART_INTERRUPT            0x59
>=20
>   #elif (RPI_MODEL =3D=3D 4)
>=20
>   #define BCM2836_V3D_BUS_INTERRUPT               0x2A
>=20
> -#define BCM2836_DMA_INTERRUPT                   0x3B
>=20
> +#define BCM2836_DMA0_INTERRUPT                  0x70
>=20
> +#define BCM2836_DMA5_INTERRUPT                  0x75
>=20
>   #define BCM2836_SPI1_INTERRUPT                  0x7D
>=20
>   #define BCM2836_SPI2_INTERRUPT                  0x7D
>=20
>   #define BCM2836_HVS_INTERRUPT                   0x41
>=20
> diff --git a/Platform/RaspberryPi/AcpiTables/Dsdt.asl b/Platform/Raspbe=
rryPi/AcpiTables/Dsdt.asl
> index b594d50bdf8e..fbc0049e6beb 100644
> --- a/Platform/RaspberryPi/AcpiTables/Dsdt.asl
> +++ b/Platform/RaspberryPi/AcpiTables/Dsdt.asl
> @@ -139,15 +139,22 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN",=
 "RPI", 2)
>             QWORDMEMORYBUF(14)
>=20
>             QWORDMEMORYBUF(15)
>=20
>             // QWORDMEMORYBUF(16)
>=20
> +#if (RPI_MODEL =3D=3D 3)
>=20
>             QWORDMEMORYBUF(17)
>=20
>             QWORDMEMORYBUF(18)
>=20
>             QWORDMEMORYBUF(19)
>=20
>             QWORDMEMORYBUF(20)
>=20
> +#elif (RPI_MODEL =3D=3D 4)
>=20
>             QWORDMEMORYBUF(21)
>=20
>             QWORDMEMORYBUF(22)
>=20
>             QWORDMEMORYBUF(23)
>=20
>             QWORDMEMORYBUF(24)
>=20
> +#endif

Assuming we are just aiming for mono on the rpi4, Do we need a separate=20
set of buffers here for both the rpi3 and 4, can't the buffers be reused=20
below?

>=20
>             QWORDMEMORYBUF(25)
>=20
> +          QWORDMEMORYBUF(26)
>=20
> +          QWORDMEMORYBUF(27)
>=20
> +          QWORDMEMORYBUF(28)
>=20
> +          QWORDMEMORYBUF(29)
>=20
>           })
>=20
>  =20
>=20
>           // USB
>=20
> @@ -181,19 +188,28 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN",=
 "RPI", 2)
>           // QWORDMEMORYSET(16, BCM2836_SPI2_OFFSET, BCM2836_SPI2_LENGT=
H)
>=20
>  =20
>=20
>           // PWM
>=20
> -        QWORDMEMORYSET(17, BCM2836_PWM_DMA_OFFSET, BCM2836_PWM_DMA_LEN=
GTH)
>=20
> -        QWORDMEMORYSET(18, BCM2836_PWM_CTRL_OFFSET, BCM2836_PWM_CTRL_L=
ENGTH)
>=20
> -        QWORDBUSMEMORYSET(19, BCM2836_PWM_BUS_BASE_ADDRESS, BCM2836_PW=
M_BUS_LENGTH)
>=20
> -        QWORDBUSMEMORYSET(20, BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS, =
BCM2836_PWM_CTRL_UNCACHED_LENGTH)
>=20
> -        QWORDMEMORYSET(21, BCM2836_PWM_CLK_OFFSET, BCM2836_PWM_CLK_LEN=
GTH)
>=20
> +#if (RPI_MODEL =3D=3D 3)
>=20
> +        QWORDMEMORYSET(17, BCM2836_DMA5_OFFSET, BCM2836_DMA_CHANNEL_LE=
NGTH)
>=20
> +        QWORDMEMORYSET(18, BCM2836_PWM0_CTRL_OFFSET, BCM2836_PWM_CTRL_=
LENGTH)
>=20
> +        QWORDBUSMEMORYSET(19, BCM2836_PWM0_CTRL_BUS_BASE_ADDRESS, BCM2=
836_PWM_CTRL_LENGTH)
>=20
> +        QWORDBUSMEMORYSET(20, BCM2836_DMA_DEVICE_OFFSET, 1)
>=20
> +#elif (RPI_MODEL =3D=3D 4)
>=20
> +        QWORDMEMORYSET(21, BCM2836_DMA0_OFFSET, BCM2836_DMA_CHANNEL_LE=
NGTH)
>=20
> +        QWORDMEMORYSET(22, BCM2836_PWM1_CTRL_OFFSET, BCM2836_PWM_CTRL_=
LENGTH)
>=20
> +        QWORDBUSMEMORYSET(23, BCM2836_PWM1_CTRL_BUS_BASE_ADDRESS, BCM2=
836_PWM_CTRL_LENGTH)
>=20
> +        QWORDBUSMEMORYSET(24, BCM2836_DMA_DEVICE_OFFSET, 1)
>=20

I would expect that the pi4 just reuses 17-30 here, or it uses both PWM=20
channels.

> +#endif
>=20
> +
>=20
> +        // PWM Clock Manager Control
>=20
> +        QWORDMEMORYSET(25, BCM2836_CM_PWM_CLOCK_CTRL_OFFSET, BCM2836_C=
M_PERIPHERAL_CLOCK_LENGTH)
>=20
>  =20
>=20
>           // UART
>=20
> -        QWORDMEMORYSET(22, BCM2836_PL011_UART_OFFSET, BCM2836_PL011_UA=
RT_LENGTH)
>=20
> -        QWORDMEMORYSET(23, BCM2836_MINI_UART_OFFSET, BCM2836_MINI_UART=
_LENGTH)
>=20
> +        QWORDMEMORYSET(26, BCM2836_PL011_UART_OFFSET, BCM2836_PL011_UA=
RT_LENGTH)
>=20
> +        QWORDMEMORYSET(27, BCM2836_MINI_UART_OFFSET, BCM2836_MINI_UART=
_LENGTH)
>=20
>  =20
>=20
>           // SDC
>=20
> -        QWORDMEMORYSET(24, MMCHS1_OFFSET, MMCHS1_LENGTH)
>=20
> -        QWORDMEMORYSET(25, SDHOST_OFFSET, SDHOST_LENGTH)
>=20
> +        QWORDMEMORYSET(28, MMCHS1_OFFSET, MMCHS1_LENGTH)
>=20
> +        QWORDMEMORYSET(29, SDHOST_OFFSET, SDHOST_LENGTH)
>=20
>  =20
>=20
>           Return (RBUF)
>=20
>         }
>=20
> diff --git a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl b/Platform/Ras=
pberryPi/AcpiTables/GpuDevs.asl
> index 9750dc25c07c..b499620e089a 100644
> --- a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl
> +++ b/Platform/RaspberryPi/AcpiTables/GpuDevs.asl
> @@ -354,12 +354,20 @@ Device (SPI1)
>   //   }
>=20
>   // }
>=20
>  =20
>=20
> -// PWM Driver
>=20
> +// PWM devices
>=20
> +//
>=20
> +// TO-DOs (that also require changes in the Windows drivers):
>=20
> +//    - drop bus addresses from _CRS and use _DMA instead
>=20
> +//    - the Clock Manager should probably have its own device definiti=
on since it's
>=20
> +//      shared between both controllers
And other things right? But we are sorta lucky here because there are=20
two PWM related registers that aren't actually shared (although they are=20
on the same 4k page as other devices registers).

But, that said. I think there might be a better, but much more complex=20
way to do this.

So, instead of trying to _DSD the base freq/etc in the next patch we=20
just define a _DSM() method which sets the audio/pwm rate. Maybe it=20
takes the audio sample rate and depth, sets up the PWM divisor and=20
returns the pwm rate. (along with errors about boundaries, or we assume=20
the sample rate is 4 bits and bound the sample rate/etc).

Also, now that i'm messing with the SPI flash which is muxed on these=20
pins, maybe the right answer in ACPI mode is to leave the LDO disabled,=20
and enable it in the PS0 call along with setting up the GPIO pins=20
appropriately. Then the rutime service only has to worry about=20
serializing access to the GPIO with the PS0/PS3 methods.

Most of the rest of this code all looks fine.


>=20
> +//    - expose both devices on the Raspberry Pi 4
>=20
> +//
>=20
> +#if (RPI_MODEL =3D=3D 3)
>=20
>   Device (PWM0)
>=20
>   {
>=20
>     Name (_HID, "BCM2844")
>=20
>     Name (_CID, "BCM2844")
>=20
> -  Name (_UID, 0)
>=20
> +  Name (_UID, 0x0)
>=20
>     Name (_CCA, 0x0)
>=20
>     Method (_STA)
>=20
>     {
>=20
> @@ -367,30 +375,70 @@ Device (PWM0)
>     }
>=20
>     Name (RBUF, ResourceTemplate ()
>=20
>     {
>=20
> -    // DMA channel 11 control
>=20
> -    MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_DMA_LENGTH, RM01)
>=20
> +    // DMA channel control
>=20
> +    MEMORY32FIXED (ReadWrite, 0, BCM2836_DMA_CHANNEL_LENGTH, RM01)
>=20
>       // PWM control
>=20
>       MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM02)
>=20
>       // PWM control bus
>=20
> -    MEMORY32FIXED (ReadWrite, BCM2836_PWM_BUS_BASE_ADDRESS, BCM2836_PW=
M_BUS_LENGTH, )
>=20
> -    // PWM control uncached
>=20
> -    MEMORY32FIXED (ReadWrite, BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS, =
BCM2836_PWM_CTRL_UNCACHED_LENGTH, )
>=20
> +    MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM03)
>=20
> +    // Uncached base address
>=20
> +    MEMORY32FIXED (ReadWrite, BCM2836_DMA_DEVICE_OFFSET, 1, )
>=20
>       // PWM clock control
>=20
> -    MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CLK_LENGTH, RM03)
>=20
> -    // Interrupt DMA channel 11
>=20
> -    Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { BCM28=
36_DMA_INTERRUPT }
>=20
> -    // DMA channel 11, DREQ 5 for PWM
>=20
> -    FixedDMA (5, 11, Width32Bit, )
>=20
> +    MEMORY32FIXED (ReadWrite, 0, BCM2836_CM_PERIPHERAL_CLOCK_LENGTH, R=
M04)
>=20
> +    // DMA channel interrupt
>=20
> +    Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { BCM28=
36_DMA5_INTERRUPT }
>=20
> +    // DREQ 5, DMA channel 5
>=20
> +    FixedDMA (5, 5, Width32Bit, )
>=20
>     })
>=20
>  =20
>=20
>     Method (_CRS, 0x0, Serialized)
>=20
>     {
>=20
> -    MEMORY32SETBASE (RBUF, RM01, RB01, BCM2836_PWM_DMA_OFFSET)
>=20
> -    MEMORY32SETBASE (RBUF, RM02, RB02, BCM2836_PWM_CTRL_OFFSET)
>=20
> -    MEMORY32SETBASE (RBUF, RM03, RB03, BCM2836_PWM_CLK_OFFSET)
>=20
> +    MEMORY32SETBASE (RBUF, RM01, RB01, BCM2836_DMA5_OFFSET)
>=20
> +    MEMORY32SETBASE (RBUF, RM02, RB02, BCM2836_PWM0_CTRL_OFFSET)
>=20
> +    MEMORY32SET (RBUF, RM03, RB03, BCM2836_PWM0_CTRL_BUS_BASE_ADDRESS)
>=20
> +    MEMORY32SETBASE (RBUF, RM04, RB04, BCM2836_CM_PWM_CLOCK_CTRL_OFFSE=
T)
>=20
>       Return (^RBUF)
>=20
>     }
>=20
>   }
>=20
> +#elif (RPI_MODEL =3D=3D 4)
>=20
> +Device (PWM1)
>=20
> +{
>=20
> +  Name (_HID, "BCM2844")
>=20
> +  Name (_CID, "BCM2844")
>=20
> +  Name (_UID, 0x1)
>=20
> +  Name (_CCA, 0x0)
>=20
> +  Method (_STA)
>=20
> +  {
>=20
> +    Return (0xf)
>=20
> +  }
>=20
> +  Name (RBUF, ResourceTemplate ()
>=20
> +  {
>=20
> +    // DMA channel control
>=20
> +    MEMORY32FIXED (ReadWrite, 0, BCM2836_DMA_CHANNEL_LENGTH, RM01)
>=20
> +    // PWM control
>=20
> +    MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM02)
>=20
> +    // PWM control bus
>=20
> +    MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM03)
>=20
> +    // Uncached base address
>=20
> +    MEMORY32FIXED (ReadWrite, BCM2836_DMA_DEVICE_OFFSET, 1, )
>=20
> +    // PWM clock control
>=20
> +    MEMORY32FIXED (ReadWrite, 0, BCM2836_CM_PERIPHERAL_CLOCK_LENGTH, R=
M04)
>=20
> +    // DMA channel interrupt
>=20
> +    Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { BCM28=
36_DMA0_INTERRUPT }
>=20
> +    // DREQ 1, DMA channel 0
>=20
> +    FixedDMA (1, 0, Width32Bit, )
>=20
> +  })
>=20
> +
>=20
> +  Method (_CRS, 0x0, Serialized)
>=20
> +  {
>=20
> +    MEMORY32SETBASE (RBUF, RM01, RB01, BCM2836_DMA0_OFFSET)
>=20
> +    MEMORY32SETBASE (RBUF, RM02, RB02, BCM2836_PWM1_CTRL_OFFSET)
>=20
> +    MEMORY32SET (RBUF, RM03, RB03, BCM2836_PWM1_CTRL_BUS_BASE_ADDRESS)
>=20
> +    MEMORY32SETBASE (RBUF, RM04, RB04, BCM2836_CM_PWM_CLOCK_CTRL_OFFSE=
T)
>=20
> +    Return (^RBUF)
>=20
> +  }
>=20
> +}
>=20
> +#endif
>=20
>  =20
>=20
>   include ("Uart.asl")
>=20
>   include ("Rhpx.asl")
>=20
> diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.=
h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
> index a930c64af379..126ee52c5ab2 100644
> --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
> +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
> @@ -17,6 +17,11 @@
>   #define BCM2836_SOC_REGISTERS                               (FixedPcd=
Get64 (PcdBcm283xRegistersAddress))
>=20
>   #define BCM2836_SOC_REGISTER_LENGTH                         0x0200000=
0
>=20
>  =20
>=20
> +/*
>=20
> + * VC memory view
>=20
> + */
>=20
> +#define BCM2836_SOC_BUS_REGISTERS                           0x7E000000
>=20
> +
>=20
>   /*
>=20
>    * Offset between the CPU's view and the VC's view of system memory.
>=20
>    */
>=20
> @@ -53,6 +58,8 @@
>   #define BCM2836_CM_EMMC_CLOCK_CONTROL                       0x01c0
>=20
>   #define BCM2836_CM_EMMC_CLOCK_DIVISOR                       0x01c4
>=20
>  =20
>=20
> +#define BCM2836_CM_PERIPHERAL_CLOCK_LENGTH                  0x00000008
>=20
> +
>=20
>   /* mailbox interface constants */
>=20
>   #define BCM2836_MBOX_OFFSET                                 0x0000b88=
0
>=20
>   #define BCM2836_MBOX_BASE_ADDRESS                           (BCM2836_=
SOC_REGISTERS + BCM2836_MBOX_OFFSET)
>=20
> @@ -113,6 +120,12 @@
>   #define BCM2836_DMA0_OFFSET                                 0x0000700=
0
>=20
>   #define BCM2836_DMA0_BASE_ADDRESS                           (BCM2836_=
SOC_REGISTERS + BCM2836_DMA0_OFFSET)
>=20
>  =20
>=20
> +#define BCM2836_DMA1_OFFSET                                 0x00007100
>=20
> +#define BCM2836_DMA1_BASE_ADDRESS                           (BCM2836_S=
OC_REGISTERS + BCM2836_DMA1_OFFSET)
>=20
> +
>=20
> +#define BCM2836_DMA5_OFFSET                                 0x00007500
>=20
> +#define BCM2836_DMA5_BASE_ADDRESS                           (BCM2836_S=
OC_REGISTERS + BCM2836_DMA5_OFFSET)
>=20
> +
>=20
>   #define BCM2836_DMA15_OFFSET                                0x00E0500=
0
>=20
>   #define BCM2836_DMA15_BASE_ADDRESS                          (BCM2836_=
SOC_REGISTERS + BCM2836_DMA15_OFFSET)
>=20
>  =20
>=20
> diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836P=
wm.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h
> index ce17724b7c21..8fd1cf66d062 100644
> --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h
> +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h
> @@ -13,22 +13,22 @@
>  =20
>=20
>   /* PWM controller constants */
>=20
>  =20
>=20
> -#define BCM2836_PWM_DMA_OFFSET                              0x00007B00
>=20
> -#define BCM2836_PWM_DMA_BASE_ADDRESS                        (BCM2836_S=
OC_REGISTERS + BCM2836_PWM_DMA_OFFSET)
>=20
> -#define BCM2836_PWM_DMA_LENGTH                              0x00000100
>=20
> +//
>=20
> +// PWM0
>=20
> +//
>=20
> +#define BCM2836_PWM0_CTRL_OFFSET                            0x0020C000
>=20
> +#define BCM2836_PWM0_CTRL_BASE_ADDRESS                      (BCM2836_S=
OC_REGISTERS + BCM2836_PWM0_CTRL_OFFSET)
>=20
> +#define BCM2836_PWM0_CTRL_BUS_BASE_ADDRESS                  (BCM2836_S=
OC_BUS_REGISTERS + BCM2836_PWM0_CTRL_OFFSET)
>=20
>  =20
>=20
> -#define BCM2836_PWM_CLK_OFFSET                              0x001010A0
>=20
> -#define BCM2836_PWM_CLK_BASE_ADDRESS                        (BCM2836_S=
OC_REGISTERS + BCM2836_PWM_CLK_OFFSET)
>=20
> -#define BCM2836_PWM_CLK_LENGTH                              0x00000008
>=20
> +//
>=20
> +// PWM1 (only on BCM2711)
>=20
> +//
>=20
> +#define BCM2836_PWM1_CTRL_OFFSET                            0x0020C800
>=20
> +#define BCM2836_PWM1_CTRL_BASE_ADDRESS                      (BCM2836_S=
OC_REGISTERS + BCM2836_PWM1_CTRL_OFFSET)
>=20
> +#define BCM2836_PWM1_CTRL_BUS_BASE_ADDRESS                  (BCM2836_S=
OC_BUS_REGISTERS + BCM2836_PWM1_CTRL_OFFSET)
>=20
>  =20
>=20
> -#define BCM2836_PWM_CTRL_OFFSET                             0x0020C000
>=20
> -#define BCM2836_PWM_CTRL_BASE_ADDRESS                       (BCM2836_S=
OC_REGISTERS + BCM2836_PWM_CTRL_OFFSET)
>=20
>   #define BCM2836_PWM_CTRL_LENGTH                             0x0000002=
8
>=20
>  =20
>=20
> -#define BCM2836_PWM_BUS_BASE_ADDRESS                        0x7E20C000
>=20
> -#define BCM2836_PWM_BUS_LENGTH                              0x00000028
>=20
> -
>=20
> -#define BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS              0xFF20C000
>=20
> -#define BCM2836_PWM_CTRL_UNCACHED_LENGTH                    0x00000028
>=20
> +#define BCM2836_CM_PWM_CLOCK_CTRL_OFFSET                    (BCM2836_C=
M_OFFSET + BCM2836_CM_PWM_CLOCK_CONTROL)
>=20
>  =20
>=20
>   #endif /* __BCM2836_PWM_H__ */
>=20