From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5B3912034EE00 for ; Tue, 7 Nov 2017 09:09:44 -0800 (PST) Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4A84872660; Tue, 7 Nov 2017 17:13:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 4A84872660 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=lersek@redhat.com Received: from lacos-laptop-7.usersys.redhat.com (ovpn-123-130.rdu2.redhat.com [10.10.123.130]) by smtp.corp.redhat.com (Postfix) with ESMTP id 20A675D756; Tue, 7 Nov 2017 17:13:41 +0000 (UTC) To: Jian J Wang , edk2-devel@lists.01.org Cc: Jiewen Yao , Eric Dong References: <20171103005729.7856-1-jian.j.wang@intel.com> From: Laszlo Ersek Message-ID: <82c64ab0-25b3-5f7d-cf99-c0d2f87e99da@redhat.com> Date: Tue, 7 Nov 2017 18:13:41 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <20171103005729.7856-1-jian.j.wang@intel.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Tue, 07 Nov 2017 17:13:43 +0000 (UTC) Subject: Re: [PATCH v2] UefiCpuPkg/CpuDxe: Fix multiple entries of RT_CODE in memory map X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 07 Nov 2017 17:09:44 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit sorry about the late response On 11/03/17 01:57, Jian J Wang wrote: >> v2 >> a. Fix an issue which will cause setting capability failure if size is smaller >> than a page. > > More than one entry of RT_CODE memory might cause boot problem for some > old OSs. This patch will fix this issue to keep OS compatibility as much > as possible. > > More detailed information, please refer to > https://bugzilla.tianocore.org/show_bug.cgi?id=753 > > Cc: Eric Dong > Cc: Jiewen Yao > Cc: Laszlo Ersek > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Jian J Wang > --- > UefiCpuPkg/CpuDxe/CpuPageTable.c | 18 ++++++++++++++---- > 1 file changed, 14 insertions(+), 4 deletions(-) > > diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c > index d312eb66f8..4a7827ebc9 100644 > --- a/UefiCpuPkg/CpuDxe/CpuPageTable.c > +++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c > @@ -809,7 +809,9 @@ RefreshGcdMemoryAttributesFromPaging ( > PageLength = 0; > > for (Index = 0; Index < NumberOfDescriptors; Index++) { > - if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) { > + if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent > + || (MemorySpaceMap[Index].BaseAddress & EFI_PAGE_MASK) != 0 > + || (MemorySpaceMap[Index].Length & EFI_PAGE_MASK) != 0) { > continue; > } When exactly do the new conditions match? I thought the base addresses and the lengths in the GCD memory space map are all page aligned. Is that not the case? If these conditions are just a sanity check (i.e. we never expect them to fire), then should we perpahs turn them into ASSERT()s? > > @@ -829,6 +831,15 @@ RefreshGcdMemoryAttributesFromPaging ( > // Sync real page attributes to GCD > BaseAddress = MemorySpaceMap[Index].BaseAddress; > MemorySpaceLength = MemorySpaceMap[Index].Length; > + Capabilities = MemorySpaceMap[Index].Capabilities | > + EFI_MEMORY_PAGETYPE_MASK; > + Status = gDS->SetMemorySpaceCapabilities ( > + BaseAddress, > + MemorySpaceLength, > + Capabilities > + ); > + ASSERT_EFI_ERROR (Status); > + OK, so I guess we simply add EFI_MEMORY_PAGETYPE_MASK to the capabilities of all memory space map entries that have a type different from non-existent. We discussed it before and (apparently) it is considered safe. > while (MemorySpaceLength > 0) { > if (PageLength == 0) { > PageEntry = GetPageTableEntry (&PagingContext, BaseAddress, &PageAttribute); > @@ -846,7 +857,6 @@ RefreshGcdMemoryAttributesFromPaging ( > if (Attributes != (MemorySpaceMap[Index].Attributes & EFI_MEMORY_PAGETYPE_MASK)) { > DoUpdate = TRUE; > Attributes |= (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_PAGETYPE_MASK); > - Capabilities = Attributes | MemorySpaceMap[Index].Capabilities; > } else { > DoUpdate = FALSE; > } > @@ -854,8 +864,8 @@ RefreshGcdMemoryAttributesFromPaging ( > > Length = MIN (PageLength, MemorySpaceLength); > if (DoUpdate) { > - gDS->SetMemorySpaceCapabilities (BaseAddress, Length, Capabilities); > - gDS->SetMemorySpaceAttributes (BaseAddress, Length, Attributes); > + Status = gDS->SetMemorySpaceAttributes (BaseAddress, Length, Attributes); > + ASSERT_EFI_ERROR (Status); > DEBUG ((DEBUG_INFO, "Update memory space attribute: [%02d] %016lx - %016lx (%08lx -> %08lx)\r\n", > Index, BaseAddress, BaseAddress + Length - 1, > MemorySpaceMap[Index].Attributes, Attributes)); > I'll let you decide about the EFI_PAGE_MASK conditions near the top. Acked-by: Laszlo Ersek Thanks Laszlo