From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id F1FE421E0BA0C for ; Thu, 1 Feb 2018 21:59:39 -0800 (PST) Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0DE57356CB; Fri, 2 Feb 2018 06:05:17 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-126-8.rdu2.redhat.com [10.10.126.8]) by smtp.corp.redhat.com (Postfix) with ESMTP id 2EA915DE00; Fri, 2 Feb 2018 06:05:14 +0000 (UTC) To: "Kinney, Michael D" , edk2-devel-01 Cc: "Ni, Ruiyu" , "Dong, Eric" , Ard Biesheuvel , "Leif Lindholm (Linaro address)" , "Yao, Jiewen" , Paolo Bonzini References: <20180130153348.31992-1-lersek@redhat.com> <20180130153348.31992-2-lersek@redhat.com> <31138ce7-0637-a755-ec57-e36ab812f259@redhat.com> <17c44add-ca8e-c346-8cc8-7e94b694a7e1@redhat.com> <352efa04-a5c3-af45-2da7-8e9e0043aee9@redhat.com> From: Laszlo Ersek Message-ID: <82f18986-68f3-367f-04a0-60ce71c273a0@redhat.com> Date: Fri, 2 Feb 2018 07:05:14 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 MIME-Version: 1.0 In-Reply-To: X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Fri, 02 Feb 2018 06:05:17 +0000 (UTC) Subject: Re: [PATCH 1/3] UefiCpuPkg/PiSmmCpuDxeSmm: update comments in IA32 SmmStartup() X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 02 Feb 2018 05:59:40 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 01/31/18 23:11, Kinney, Michael D wrote: > Laszlo, > > I agree the Unaligned functions have issues. > We should see if we could change the param type. > It should be a backwards compatible change to > go from a type specific pointer to VOID *. But > need to check with all supported compilers. > > We can have arch specific functions and macros. > There are many in BaseLib.h. This way, if a macro > or function is used by an unsupported arch, the > build will fail. I also like some of the name > change suggestions. Maybe PatchInstructionX86() > and change the parameter name to InstructionEnd. > > BaseLib.h > ========== > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) > > VOID > EFIAPI > PatchInstructionX86 ( > VOID *InstructionEnd, > UINT64 PatchValue, > UINTN ValueSize > ); > > #endif > > BaseLib Instance > ========== > VOID > EFIAPI > PatchInstructionX86 ( > VOID *InstructionEnd, > UINT64 PatchValue, > UINTN ValueSize > ) > { > ASSERT ((UINTN)InstructionEnd > ValueSize); > switch (ValueSize) { > case 1: > ASSERT (PatchValue <= MAX_UINT8); > *((UINT8 *)InstructionEnd - 1) = (UINT8)PatchValue; > case 2: > ASSERT (PatchValue <= MAX_UINT16); > WriteUnaligned16 ((UINT16 *)(InstructionEnd) - 1, (UINT16)PatchValue)); > break; > case 4: > ASSERT (PatchValue <= MAX_UINT32); > WriteUnaligned32 ((UINT32 *)(InstructionEnd) - 1, (UINT32)PatchValue)); > break; > case 8: > WriteUnaligned64 ((UINT64 *)(InstructionEnd) - 1, PatchValue)); > break; > default: > ASSERT (FALSE); > } > } I managed to remove all instruction DBs from PiSmmCpuDxeSmm. I plan to post the patches this week or the next. Thanks! Laszlo